How to use the cocotb.SIM_NAME.lower function in cocotb

@cocotb.test(skip=cocotb.SIM_NAME.lower().startswith("icarus"))
async def test_unicode_handle_assignment_deprecated(dut):
    with assert_deprecated() as warns:
        dut.stream_in_string <= "Bad idea"
        await cocotb.triggers.ReadWrite()
    assert "bytes" in str(warns[0].message)

@cocotb.test(skip=(cocotb.LANGUAGE in ["verilog"] or cocotb.SIM_NAME.lower().startswith(("riviera"))))
def test_direct_constant_indexing(dut):
    """Test directly accessing constant/parameter data in arrays, i.e. not iterating"""

    tlog = logging.getLogger("cocotb.test")

    yield Timer(2000)

    tlog.info("Checking Types of complex array structures in constants/parameters.")
    _check_type(tlog, dut.param_rec, HierarchyObject)
    _check_type(tlog, dut.param_rec.a, ConstantObject)
    _check_type(tlog, dut.param_rec.b, NonHierarchyIndexableObject)
    _check_type(tlog, dut.param_rec.b[1], ConstantObject)

    _check_type(tlog, dut.param_cmplx, NonHierarchyIndexableObject)
    _check_type(tlog, dut.param_cmplx[0], HierarchyObject)
    _check_type(tlog, dut.param_cmplx[0].a, ConstantObject)

@cocotb.test(skip=cocotb.SIM_NAME.lower().startswith(("icarus", "ghdl")))
async def test_ndim_array_indexes(dut):
    """Test getting and setting values of multi-dimensional array indexes."""

    cocotb.fork(Clock(dut.clk, 1000, 'ns').start())

    dut.array_2d <= [
        [0xF0, 0xE0, 0xD0, 0xC0],
        [0xB0, 0xA0, 0x90, 0x80]
    ]

    await Timer(1000, 'ns')

    # Check indices
    _check_value(tlog, dut.array_2d[1]    , [0xB0, 0xA0, 0x90, 0x80])
    _check_value(tlog, dut.array_2d[0][31], 0xF0)
    _check_value(tlog, dut.array_2d[1][29], 0x90)

@cocotb.test(skip=cocotb.SIM_NAME.lower().startswith("icarus"))
async def test_string_handle_takes_bytes(dut):
    dut.stream_in_string.value = b"bytes"
    await cocotb.triggers.Timer(10, 'ns')
    val = dut.stream_in_string.value
    assert isinstance(val, bytes)
    assert val == b"bytes"

def recursive_discovery_boundary(dut):
    """
    Iteration though the boundary works but this just double checks
    """
    if cocotb.SIM_NAME.lower().startswith(("ncsim", "xmsim")):
        pass_total = 462
    else:
        pass_total = 478

    tlog = logging.getLogger("cocotb.test")
    yield Timer(100)
    total = recursive_dump(dut.i_vhdl, tlog)
    tlog.info("Found a total of %d things", total)
    if total != pass_total:
        raise TestFailure("Expected %d objects but found %d" % (pass_total, total))

def recursive_discovery(dut):
    """
    Recursively discover every single object in the design
    """
    if cocotb.SIM_NAME.lower().startswith(("ncsim", "xmsim")):
        # vpiAlways = 31 and vpiStructVar = 2 do not show up in IUS/Xcelium
        pass_total = 917
    elif cocotb.SIM_NAME.lower().startswith(("modelsim")):
        pass_total = 933
    else:
        pass_total = 966

    tlog = logging.getLogger("cocotb.test")
    yield Timer(100)
    total = recursive_dump(dut, tlog)

    if pass_total != total:
        raise TestFailure("Expected %d but found %d" % (pass_total, total))
    else:
        tlog.info("Found a total of %d things", total)

    if not isinstance(dut.i_verilog.uart1.baud_gen_1.baud_freq, cocotb.handle.ModifiableObject):
        tlog.error("Expected dut.i_verilog.uart1.baud_gen_1.baud_freq to be modifiable")
        tlog.error("but it was %s" % type(dut.i_verilog.uart1.baud_gen_1.baud_freq).__name__)

    skip=cocotb.SIM_NAME.lower().startswith("riviera"),  # gh-1859
    expect_error=cocotb.result.SimFailure,
    stage=1,
)
def test_sim_failure_a(dut):
    # invoke a deadlock, as nothing is driving this clock
    yield cocotb.triggers.RisingEdge(dut.clk)

if not (cocotb.LANGUAGE in ["verilog"] and cocotb.SIM_NAME.lower().startswith(("riviera")) and
            cocotb.SIM_VERSION.startswith(("2016.02"))):

        _check_type(tlog, dut.sig_cmplx[1], HierarchyObject)
        _check_type(tlog, dut.sig_cmplx[1].a, ModifiableObject)
        _check_type(tlog, dut.sig_cmplx[1].b, NonHierarchyIndexableObject)
        _check_type(tlog, dut.sig_cmplx[1].b[1], ModifiableObject)
        _check_type(tlog, dut.sig_cmplx[1].b[1][2], ModifiableObject)

    _check_type(tlog, dut.sig_rec, HierarchyObject)
    _check_type(tlog, dut.sig_rec.a, ModifiableObject)
    _check_type(tlog, dut.sig_rec.b, NonHierarchyIndexableObject)

    # Riviera has a bug and finds dut.sig_rec.b[1], but the type returned is 0 which is unknown
    # only true for version 2016.02
    if not (cocotb.LANGUAGE in ["verilog"] and cocotb.SIM_NAME.lower().startswith(("riviera")) and
            cocotb.SIM_VERSION.startswith(("2016.02"))):
        _check_type(tlog, dut.sig_rec.b[1], ModifiableObject)
        _check_type(tlog, dut.sig_rec.b[1][2], ModifiableObject)

tlog = logging.getLogger("cocotb.test")

    yield Timer(1)

    test_handles = [
        (dut.stream_in_ready, "GPI_REGISTER"),
        (dut.register_array, "GPI_ARRAY"),
        (dut.NUM_OF_MODULES, "GPI_PARAMETER"),
        (dut.temp, "GPI_REGISTER"),
        (dut.and_output, "GPI_NET"),
        (dut.stream_in_data, "GPI_NET"),
        (dut.logic_b, "GPI_REGISTER"),
        (dut.logic_c, "GPI_REGISTER"),
    ]

    if cocotb.SIM_NAME.lower().startswith(("icarus")):
        test_handles.append((dut.logic_a, "GPI_NET"))  # https://github.com/steveicarus/iverilog/issues/312
    else:
        test_handles.append((dut.logic_a, "GPI_REGISTER"))

    for handle in test_handles:
        tlog.info("Handle %s" % (handle[0]._fullname,))
        if handle[0]._type != handle[1]:
            raise TestFailure("Expected %s found %s for %s" % (handle[1], handle[0]._type, handle[0]._fullname))