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def enter_idle(self):
response = self._device.transfer([Commands.GET_CURRENT_MODE], readSize=2)
if response[0] == Commands.DEV_DFU_MODE:
self._device.transfer([Commands.DFU_COMMAND, Commands.DFU_EXIT])
elif response[0] == Commands.DEV_JTAG_MODE:
self._device.transfer([Commands.JTAG_COMMAND, Commands.JTAG_EXIT])
elif response[0] == Commands.DEV_SWIM_MODE:
self._device.transfer([Commands.SWIM_COMMAND, Commands.SWIM_EXIT])
self._protocol = None
def _write_mem(self, addr, data, memcmd, max, apsel):
with self._lock:
while len(data):
thisTransferSize = min(len(data), max)
thisTransferData = data[:thisTransferSize]
cmd = [Commands.JTAG_COMMAND, memcmd]
cmd.extend(six.iterbytes(struct.pack('
def enter_idle(self):
response = self._device.transfer([Commands.GET_CURRENT_MODE], readSize=2)
if response[0] == Commands.DEV_DFU_MODE:
self._device.transfer([Commands.DFU_COMMAND, Commands.DFU_EXIT])
elif response[0] == Commands.DEV_JTAG_MODE:
self._device.transfer([Commands.JTAG_COMMAND, Commands.JTAG_EXIT])
elif response[0] == Commands.DEV_SWIM_MODE:
self._device.transfer([Commands.SWIM_COMMAND, Commands.SWIM_EXIT])
self._protocol = None
def write_mem8(self, addr, data, apsel):
self._write_mem(addr, data, Commands.JTAG_WRITEMEM_8BIT, self._device.max_packet_size, apsel)
def read_mem16(self, addr, size, apsel):
assert (addr & 0x1) == 0 and (size & 0x1) == 0, "address and size must be half-word aligned"
if self._jtag_version < self.MIN_JTAG_VERSION_16BIT_XFER:
# 16-bit r/w is only available from J26, so revert to 8-bit accesses.
return self.read_mem8(addr, size, apsel)
return self._read_mem(addr, size, Commands.JTAG_READMEM_16BIT, self.MAXIMUM_TRANSFER_SIZE, apsel)