How to use the skidl.Pin.TRISTATE function in skidl

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github xesscorp / skidl / skidl / libs / display_sklib.py View on Github external
Pin(num='9',name='g',do_erc=True),
            Pin(num='10',name='a',do_erc=True),
            Pin(num='11',name='f',do_erc=True),
            Pin(num='12',name='b',do_erc=True),
            Pin(num='13',name='b',do_erc=True),
            Pin(num='14',name='f',do_erc=True),
            Pin(num='15',name='a',do_erc=True),
            Pin(num='16',name='g',do_erc=True)]),
        Part(name='DISPLAY',dest=TEMPLATE,tool=SKIDL,keywords='DEV',description='Afficheur LCD nLignes',ref_prefix='S',num_units=1,do_erc=True,pins=[
            Pin(num='1',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='2',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='3',name='VLCD',do_erc=True),
            Pin(num='4',name='RS',do_erc=True),
            Pin(num='5',name='R/W',do_erc=True),
            Pin(num='6',name='CS',do_erc=True),
            Pin(num='7',name='D0',func=Pin.TRISTATE,do_erc=True),
            Pin(num='8',name='D1',func=Pin.TRISTATE,do_erc=True),
            Pin(num='9',name='D2',func=Pin.TRISTATE,do_erc=True),
            Pin(num='10',name='D3',func=Pin.TRISTATE,do_erc=True),
            Pin(num='11',name='D4',func=Pin.TRISTATE,do_erc=True),
            Pin(num='12',name='D5',func=Pin.TRISTATE,do_erc=True),
            Pin(num='13',name='D6',func=Pin.TRISTATE,do_erc=True),
            Pin(num='14',name='D7',func=Pin.TRISTATE,do_erc=True)]),
        Part(name='DISPLAY_3_LIGNE',dest=TEMPLATE,tool=SKIDL,description='DISPLAY EA7123-12C',ref_prefix='S',num_units=1,do_erc=True,pins=[
            Pin(num='1',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='2',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='3',name='VLCD',do_erc=True),
            Pin(num='4',name='VO',do_erc=True),
            Pin(num='5',name='SDA',do_erc=True),
            Pin(num='6',name='SCL',do_erc=True)]),
        Part(name='DOT-BAR',dest=TEMPLATE,tool=SKIDL,keywords='BAR DOT',description='GRAPH unit',ref_prefix='BAR',num_units=10,do_erc=True,pins=[
            Pin(num='1',name='A',func=Pin.PASSIVE,do_erc=True),
github xesscorp / skidl / skidl / libs / philips_sklib.py View on Github external
Part(name='PCF8584',dest=TEMPLATE,tool=SKIDL,keywords='I2C Bus',description='I2C Bus Controller, DIP/SOIC-20',ref_prefix='U',num_units=1,fplist=['DIP*', 'PDIP*', 'SO*', 'SOIC*'],do_erc=True,pins=[
            Pin(num='1',name='CLK',do_erc=True),
            Pin(num='2',name='SDA',func=Pin.BIDIR,do_erc=True),
            Pin(num='3',name='SCL',func=Pin.BIDIR,do_erc=True),
            Pin(num='4',name='~IACK~',do_erc=True),
            Pin(num='5',name='~INT~',func=Pin.OUTPUT,do_erc=True),
            Pin(num='6',name='A0',do_erc=True),
            Pin(num='7',name='D0',func=Pin.TRISTATE,do_erc=True),
            Pin(num='8',name='D1',func=Pin.TRISTATE,do_erc=True),
            Pin(num='9',name='D2',func=Pin.TRISTATE,do_erc=True),
            Pin(num='10',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='20',name='VDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='11',name='D3',func=Pin.TRISTATE,do_erc=True),
            Pin(num='12',name='D4',func=Pin.TRISTATE,do_erc=True),
            Pin(num='13',name='D5',func=Pin.TRISTATE,do_erc=True),
            Pin(num='14',name='D6',func=Pin.TRISTATE,do_erc=True),
            Pin(num='15',name='D7',func=Pin.TRISTATE,do_erc=True),
            Pin(num='16',name='~RD~',func=Pin.PASSIVE,do_erc=True),
            Pin(num='17',name='~CS~',do_erc=True),
            Pin(num='18',name='~WR~',do_erc=True),
            Pin(num='19',name='~RST~',func=Pin.BIDIR,do_erc=True)]),
        Part(name='PCF8591',dest=TEMPLATE,tool=SKIDL,keywords='I2C ADC DAC',description='4ch ADC, 1 DAC, I2C Bus Interface, DIP/SOIC-16',ref_prefix='U',num_units=1,fplist=['DIP*', 'PDIP*', 'SO*', 'SOIC*'],do_erc=True,pins=[
            Pin(num='1',name='AIN0',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='AIN1',func=Pin.PASSIVE,do_erc=True),
            Pin(num='3',name='AIN2',func=Pin.PASSIVE,do_erc=True),
            Pin(num='4',name='AIN3',func=Pin.PASSIVE,do_erc=True),
            Pin(num='5',name='A0',do_erc=True),
            Pin(num='6',name='A1',do_erc=True),
            Pin(num='7',name='A2',do_erc=True),
            Pin(num='8',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='9',name='SDA',func=Pin.BIDIR,do_erc=True),
            Pin(num='10',name='SCL',do_erc=True),
github xesscorp / skidl / skidl / libs / maxim_sklib.py View on Github external
Pin(num='1',name='32KHZ',func=Pin.OUTPUT,do_erc=True),
            Pin(num='2',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='3',name='~INT~/SQW',func=Pin.OPENCOLL,do_erc=True),
            Pin(num='4',name='~RST',func=Pin.BIDIR,do_erc=True),
            Pin(num='5',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='6',name='VBAT',func=Pin.PWRIN,do_erc=True),
            Pin(num='7',name='SDA',func=Pin.BIDIR,do_erc=True),
            Pin(num='8',name='SCL',do_erc=True)]),
        Part(name='MAX1248',dest=TEMPLATE,tool=SKIDL,keywords='10-Bit ADC Serial 4-Channel Maxim',description='4-Channel 10-Bit ADC with Serial Interface, +2.7V to +5.25V, Low-Power',ref_prefix='U',num_units=1,fplist=['DIP*', 'QSOP*'],do_erc=True,aliases=['MAX1249'],pins=[
            Pin(num='1',name='VDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='2',name='CH0',do_erc=True),
            Pin(num='3',name='CH1',do_erc=True),
            Pin(num='4',name='CH2',do_erc=True),
            Pin(num='5',name='CH3',do_erc=True),
            Pin(num='6',name='COM',func=Pin.PWRIN,do_erc=True),
            Pin(num='7',name='~SHDN',func=Pin.TRISTATE,do_erc=True),
            Pin(num='8',name='VREF',func=Pin.PWRIN,do_erc=True),
            Pin(num='9',name='REFADJ',do_erc=True),
            Pin(num='10',name='AGND',func=Pin.PWRIN,do_erc=True),
            Pin(num='11',name='DGND',func=Pin.PWRIN,do_erc=True),
            Pin(num='12',name='DOUT',func=Pin.OUTPUT,do_erc=True),
            Pin(num='13',name='SSTRB',func=Pin.OUTPUT,do_erc=True),
            Pin(num='14',name='DIN',do_erc=True),
            Pin(num='15',name='~CS',do_erc=True),
            Pin(num='16',name='SCLK',do_erc=True)]),
        Part(name='MAX2606',dest=TEMPLATE,tool=SKIDL,do_erc=True,aliases=['MAX2505', 'MAX2507', 'MAX2508', 'MAX2509']),
        Part(name='MAX31820',dest=TEMPLATE,tool=SKIDL,keywords='OneWire 1-Wire 1Wire Maxim Dallas',description='1-Wire Ambient Temperature Sensor',ref_prefix='U',num_units=1,fplist=['TO-92_*'],do_erc=True,aliases=['DS1822', 'DS18B20', 'DS18S20', 'DS1821C'],pins=[
            Pin(num='1',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='2',name='DQ',func=Pin.BIDIR,do_erc=True),
            Pin(num='3',name='VDD',func=Pin.PWRIN,do_erc=True)]),
        Part(name='MAX31820PAR',dest=TEMPLATE,tool=SKIDL,keywords='OneWire 1-Wire 1Wire Maxim Dallas',description='1-Wire, Parasite-Power, Ambient Temperature Sensor',ref_prefix='U',num_units=1,fplist=['TO-92_*'],do_erc=True,aliases=['DS1822-PAR', 'DS18B20-PAR', 'DS18S20-PAR', 'DS2401'],pins=[
            Pin(num='1',name='GND',func=Pin.PWRIN,do_erc=True),
github xesscorp / skidl / skidl / libs / microcontrollers_sklib.py View on Github external
microcontrollers = SchLib(tool=SKIDL).add_parts(*[
        Part(name='ADUC816',dest=TEMPLATE,tool=SKIDL,keywords='8051 CORE MCU ADC DAC',description='8KB Flash, 256B SRAM, 640B EEPROM, 16-bit ADC, 12-bit DAC, MQFP-52',ref_prefix='U',num_units=1,fplist=['MQFP*'],do_erc=True,pins=[
            Pin(num='1',name='P1.0(T2)',func=Pin.BIDIR,do_erc=True),
            Pin(num='2',name='P1.1(T2EX)',func=Pin.BIDIR,do_erc=True),
            Pin(num='3',name='P1.2(DAC/IEXC1)',func=Pin.BIDIR,do_erc=True),
            Pin(num='4',name='P1.3(AIN5/IEXC2)',func=Pin.BIDIR,do_erc=True),
            Pin(num='5',name='AVDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='6',name='AGND',func=Pin.PWRIN,do_erc=True),
            Pin(num='7',name='REF-',func=Pin.PASSIVE,do_erc=True),
            Pin(num='8',name='REF+',func=Pin.PASSIVE,do_erc=True),
            Pin(num='9',name='P1.4(AIN1)',do_erc=True),
            Pin(num='10',name='P1.5(AIN2)',do_erc=True),
            Pin(num='20',name='DVDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='30',name='(A10)P2.2',func=Pin.BIDIR,do_erc=True),
            Pin(num='40',name='~EA~',func=Pin.BIDIR,do_erc=True),
            Pin(num='50',name='(AD5)P0.5',func=Pin.TRISTATE,do_erc=True),
            Pin(num='11',name='P1.6(AIN3)',do_erc=True),
            Pin(num='21',name='DGND',func=Pin.PWRIN,do_erc=True),
            Pin(num='31',name='(A11)P2.3',func=Pin.BIDIR,do_erc=True),
            Pin(num='41',name='~PSEN~',func=Pin.OUTPUT,do_erc=True),
            Pin(num='51',name='(AD6)P0.6',func=Pin.TRISTATE,do_erc=True),
            Pin(num='12',name='P1.7(AIN4)',func=Pin.BIDIR,do_erc=True),
            Pin(num='22',name='(T0)P3.4',func=Pin.BIDIR,do_erc=True),
            Pin(num='32',name='XTAL1',do_erc=True),
            Pin(num='42',name='ALE',func=Pin.OUTPUT,do_erc=True),
            Pin(num='52',name='(AD7)P0.7',func=Pin.TRISTATE,do_erc=True),
            Pin(num='13',name='~SS~',do_erc=True),
            Pin(num='23',name='(T1)P3.5',func=Pin.BIDIR,do_erc=True),
            Pin(num='33',name='XTAL2',func=Pin.OUTPUT,do_erc=True),
            Pin(num='43',name='(AD0)P0.0',func=Pin.TRISTATE,do_erc=True),
            Pin(num='14',name='MISO',do_erc=True),
            Pin(num='24',name='(~WR~)P3.6',func=Pin.BIDIR,do_erc=True),
github xesscorp / skidl / skidl / libs / microcontrollers_sklib.py View on Github external
Pin(num='16',name='(RxD)P3.0',func=Pin.BIDIR,do_erc=True),
            Pin(num='26',name='SCLOCK',func=Pin.BIDIR,do_erc=True),
            Pin(num='36',name='(A12)P2.4',func=Pin.BIDIR,do_erc=True),
            Pin(num='46',name='(AD3)P0.3',func=Pin.TRISTATE,do_erc=True),
            Pin(num='17',name='(TxD)P3.1',func=Pin.BIDIR,do_erc=True),
            Pin(num='27',name='SDATA/MOSI',func=Pin.BIDIR,do_erc=True),
            Pin(num='37',name='(A13)P2.5',func=Pin.BIDIR,do_erc=True),
            Pin(num='47',name='DGND',func=Pin.PWRIN,do_erc=True),
            Pin(num='18',name='(~INT0~)P3.2',func=Pin.BIDIR,do_erc=True),
            Pin(num='28',name='(A8)P2.0',func=Pin.BIDIR,do_erc=True),
            Pin(num='38',name='(A14)P2.6',func=Pin.BIDIR,do_erc=True),
            Pin(num='48',name='DVDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='19',name='(~INT1~)P3.3',func=Pin.BIDIR,do_erc=True),
            Pin(num='29',name='(A9)P2.1',func=Pin.BIDIR,do_erc=True),
            Pin(num='39',name='(A15)P2.7',func=Pin.BIDIR,do_erc=True),
            Pin(num='49',name='(AD4)P0.4',func=Pin.TRISTATE,do_erc=True)]),
        Part(name='P89LPC832A1FA',dest=TEMPLATE,tool=SKIDL,keywords='Philips 8051 Turbo Core',description='P89LPC932A1FA, 8kB Flash, 256 SRAM, 8bit MCS51 2-cycle Core Microcontroller, PLCC-28',ref_prefix='U',num_units=1,fplist=['PLCC*'],do_erc=True,pins=[
            Pin(num='1',name='ICB/P2.0',func=Pin.BIDIR,do_erc=True),
            Pin(num='2',name='OCD/P2.1',func=Pin.BIDIR,do_erc=True),
            Pin(num='3',name='P0.0/CMP2/KBI0',func=Pin.BIDIR,do_erc=True),
            Pin(num='4',name='P1.7/OCC',func=Pin.BIDIR,do_erc=True),
            Pin(num='5',name='P1.6/OCB',func=Pin.BIDIR,do_erc=True),
            Pin(num='6',name='P1.5/~RST',func=Pin.BIDIR,do_erc=True),
            Pin(num='7',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='8',name='XTAL1/P3.1',func=Pin.BIDIR,do_erc=True),
            Pin(num='9',name='CLKOUT/XTAL2/P3.0',func=Pin.BIDIR,do_erc=True),
            Pin(num='10',name='P1.4/~INT1',func=Pin.BIDIR,do_erc=True),
            Pin(num='20',name='P0.6/CMP1/KBI6',func=Pin.BIDIR,do_erc=True),
            Pin(num='11',name='P1.3/~INT0~/SDA',func=Pin.BIDIR,do_erc=True),
            Pin(num='21',name='VDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='12',name='P1.2/T0/SCL',func=Pin.BIDIR,do_erc=True),
            Pin(num='22',name='P0.5/CMPREF/KBI5',func=Pin.BIDIR,do_erc=True),
github xesscorp / skidl / skidl / libs / 74xgxx_sklib.py View on Github external
Part(name='74LVC2G125',dest=TEMPLATE,tool=SKIDL,keywords='Dual Buff Tri-State LVC CMOS',description='Dual Buffer Tri-State, Low-Voltage CMOS',ref_prefix='U',num_units=2,fplist=['VSSOP*'],do_erc=True,aliases=['74AUC2G125'],pins=[
            Pin(num='4',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='8',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='1',name='~',do_erc=True),
            Pin(num='2',name='~',do_erc=True),
            Pin(num='6',name='~',func=Pin.TRISTATE,do_erc=True),
            Pin(num='3',name='~',func=Pin.TRISTATE,do_erc=True),
            Pin(num='5',name='~',do_erc=True),
            Pin(num='7',name='~',do_erc=True)]),
        Part(name='74LVC2G126',dest=TEMPLATE,tool=SKIDL,keywords='Dual Buff Tri-State LVC CMOS',description='Dual Buffer Tri-State, Low-Voltage CMOS',ref_prefix='U',num_units=2,fplist=['VSSOP*'],do_erc=True,aliases=['74AUC2G126'],pins=[
            Pin(num='4',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='8',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='1',name='~',do_erc=True),
            Pin(num='2',name='~',do_erc=True),
            Pin(num='6',name='~',func=Pin.TRISTATE,do_erc=True),
            Pin(num='3',name='~',func=Pin.TRISTATE,do_erc=True),
            Pin(num='5',name='~',do_erc=True),
            Pin(num='7',name='~',do_erc=True)]),
        Part(name='74LVC2G14',dest=TEMPLATE,tool=SKIDL,keywords='Dual Gate NOT Schmidt LVC CMOS',description='Dual NOT Gate Schmidt Triggered, Low-Voltage CMOS',ref_prefix='U',num_units=2,fplist=['SG-*', 'SOT*'],do_erc=True,pins=[
            Pin(num='2',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='5',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='1',name='~',do_erc=True),
            Pin(num='6',name='~',func=Pin.OUTPUT,do_erc=True),
            Pin(num='3',name='~',do_erc=True),
            Pin(num='4',name='~',func=Pin.OUTPUT,do_erc=True)]),
        Part(name='74LVC2G157',dest=TEMPLATE,tool=SKIDL,keywords='Single Mux CMOS',description='Single 2 to 1 Multiplexer, Low-Voltage CMOS',ref_prefix='U',num_units=1,fplist=['SSOP*', 'VSSOP*'],do_erc=True,pins=[
            Pin(num='1',name='A',do_erc=True),
            Pin(num='2',name='B',do_erc=True),
            Pin(num='3',name='~Y',func=Pin.OUTPUT,do_erc=True),
            Pin(num='4',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='5',name='Y',func=Pin.OUTPUT,do_erc=True),
            Pin(num='6',name='~A~/B',do_erc=True),
github xesscorp / skidl / skidl / libs / Lattice_sklib.py View on Github external
Lattice = SchLib(tool=SKIDL).add_parts(*[
        Part(name='GAL16V8',dest=TEMPLATE,tool=SKIDL,keywords='GAL PLD 16V8',description='Programmable Logic Array, DIP-20/SOIC-20/PLCC-20',ref_prefix='U',num_units=1,fplist=['DIP*', 'PDIP*', 'SOIC*', 'SO*', 'PLCC*'],do_erc=True,pins=[
            Pin(num='10',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='20',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='1',name='I1/CLK',do_erc=True),
            Pin(num='2',name='I2',do_erc=True),
            Pin(num='3',name='I3',do_erc=True),
            Pin(num='4',name='I4',do_erc=True),
            Pin(num='5',name='I5',do_erc=True),
            Pin(num='6',name='I6',do_erc=True),
            Pin(num='7',name='I7',do_erc=True),
            Pin(num='8',name='I8',do_erc=True),
            Pin(num='9',name='I9',do_erc=True),
            Pin(num='11',name='I10/~OE~',do_erc=True),
            Pin(num='12',name='IO8',func=Pin.TRISTATE,do_erc=True),
            Pin(num='13',name='IO7',func=Pin.TRISTATE,do_erc=True),
            Pin(num='14',name='IO6',func=Pin.TRISTATE,do_erc=True),
            Pin(num='15',name='IO5',func=Pin.TRISTATE,do_erc=True),
            Pin(num='16',name='IO4',func=Pin.TRISTATE,do_erc=True),
            Pin(num='17',name='I03',func=Pin.TRISTATE,do_erc=True),
            Pin(num='18',name='IO2',func=Pin.TRISTATE,do_erc=True),
            Pin(num='19',name='IO1',func=Pin.TRISTATE,do_erc=True)]),
        Part(name='PAL16L8',dest=TEMPLATE,tool=SKIDL,keywords='PAL PLD 16L8',description='Programmable Logic Array, DIP-20',ref_prefix='U',num_units=1,fplist=['DIP*', 'PDIP*'],do_erc=True,pins=[
            Pin(num='10',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='20',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='1',name='I1',do_erc=True),
            Pin(num='2',name='I2',do_erc=True),
            Pin(num='3',name='I3',do_erc=True),
            Pin(num='4',name='I4',do_erc=True),
            Pin(num='5',name='I5',do_erc=True),
            Pin(num='6',name='I6',do_erc=True),
github xesscorp / skidl / skidl / libs / memory_sklib.py View on Github external
Pin(num='19',name='D5',func=Pin.TRISTATE,do_erc=True),
            Pin(num='29',name='A14',do_erc=True)]),
        Part(name='27C040',dest=TEMPLATE,tool=SKIDL,keywords='REPROM 512KO',description='REPROM 512 K x 8 bits (32 pins DIP or PLCC)',ref_prefix='U',num_units=1,do_erc=True,pins=[
            Pin(num='32',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='16',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='1',name='VPP',do_erc=True),
            Pin(num='2',name='A16',do_erc=True),
            Pin(num='3',name='A15',do_erc=True),
            Pin(num='4',name='A12',do_erc=True),
            Pin(num='5',name='A7',do_erc=True),
            Pin(num='6',name='A6',do_erc=True),
            Pin(num='7',name='A5',do_erc=True),
            Pin(num='8',name='A4',do_erc=True),
            Pin(num='9',name='A3',do_erc=True),
            Pin(num='10',name='A2',do_erc=True),
            Pin(num='20',name='D6',func=Pin.TRISTATE,do_erc=True),
            Pin(num='30',name='A17',do_erc=True),
            Pin(num='11',name='A1',do_erc=True),
            Pin(num='21',name='D7',func=Pin.TRISTATE,do_erc=True),
            Pin(num='31',name='A18',do_erc=True),
            Pin(num='12',name='A0',do_erc=True),
            Pin(num='22',name='CE',do_erc=True),
            Pin(num='13',name='D0',func=Pin.TRISTATE,do_erc=True),
            Pin(num='23',name='A10',do_erc=True),
            Pin(num='14',name='D1',func=Pin.TRISTATE,do_erc=True),
            Pin(num='24',name='OE',do_erc=True),
            Pin(num='15',name='D2',func=Pin.TRISTATE,do_erc=True),
            Pin(num='25',name='A11',do_erc=True),
            Pin(num='26',name='A9',do_erc=True),
            Pin(num='17',name='D3',func=Pin.TRISTATE,do_erc=True),
            Pin(num='27',name='A8',do_erc=True),
            Pin(num='18',name='D4',func=Pin.TRISTATE,do_erc=True),
github xesscorp / skidl / skidl / libs / display_sklib.py View on Github external
Pin(num='12',name='b',do_erc=True),
            Pin(num='13',name='b',do_erc=True),
            Pin(num='14',name='f',do_erc=True),
            Pin(num='15',name='a',do_erc=True),
            Pin(num='16',name='g',do_erc=True)]),
        Part(name='DISPLAY',dest=TEMPLATE,tool=SKIDL,keywords='DEV',description='Afficheur LCD nLignes',ref_prefix='S',num_units=1,do_erc=True,pins=[
            Pin(num='1',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='2',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='3',name='VLCD',do_erc=True),
            Pin(num='4',name='RS',do_erc=True),
            Pin(num='5',name='R/W',do_erc=True),
            Pin(num='6',name='CS',do_erc=True),
            Pin(num='7',name='D0',func=Pin.TRISTATE,do_erc=True),
            Pin(num='8',name='D1',func=Pin.TRISTATE,do_erc=True),
            Pin(num='9',name='D2',func=Pin.TRISTATE,do_erc=True),
            Pin(num='10',name='D3',func=Pin.TRISTATE,do_erc=True),
            Pin(num='11',name='D4',func=Pin.TRISTATE,do_erc=True),
            Pin(num='12',name='D5',func=Pin.TRISTATE,do_erc=True),
            Pin(num='13',name='D6',func=Pin.TRISTATE,do_erc=True),
            Pin(num='14',name='D7',func=Pin.TRISTATE,do_erc=True)]),
        Part(name='DISPLAY_3_LIGNE',dest=TEMPLATE,tool=SKIDL,description='DISPLAY EA7123-12C',ref_prefix='S',num_units=1,do_erc=True,pins=[
            Pin(num='1',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='2',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='3',name='VLCD',do_erc=True),
            Pin(num='4',name='VO',do_erc=True),
            Pin(num='5',name='SDA',do_erc=True),
            Pin(num='6',name='SCL',do_erc=True)]),
        Part(name='DOT-BAR',dest=TEMPLATE,tool=SKIDL,keywords='BAR DOT',description='GRAPH unit',ref_prefix='BAR',num_units=10,do_erc=True,pins=[
            Pin(num='1',name='A',func=Pin.PASSIVE,do_erc=True),
            Pin(num='20',name='K',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='A',func=Pin.PASSIVE,do_erc=True),
            Pin(num='19',name='K',func=Pin.PASSIVE,do_erc=True),
github xesscorp / skidl / skidl / libs / cmos4000_sklib.py View on Github external
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib

SKIDL_lib_version = '0.0.1'

cmos4000 = SchLib(tool=SKIDL).add_parts(*[
        Part(name='14529',dest=TEMPLATE,tool=SKIDL,keywords='CMOS MUX MUX4',description='Dual 4 to 1 Multiplexer',ref_prefix='U',num_units=1,do_erc=True,pins=[
            Pin(num='1',name='STX',do_erc=True),
            Pin(num='2',name='X0',do_erc=True),
            Pin(num='3',name='X1',do_erc=True),
            Pin(num='4',name='X2',do_erc=True),
            Pin(num='5',name='X3',do_erc=True),
            Pin(num='6',name='A',do_erc=True),
            Pin(num='7',name='B',do_erc=True),
            Pin(num='8',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='9',name='Z',func=Pin.TRISTATE,do_erc=True),
            Pin(num='10',name='W',func=Pin.TRISTATE,do_erc=True),
            Pin(num='11',name='Y3',do_erc=True),
            Pin(num='12',name='Y2',do_erc=True),
            Pin(num='13',name='Y1',do_erc=True),
            Pin(num='14',name='Y0',do_erc=True),
            Pin(num='15',name='STY',do_erc=True),
            Pin(num='16',name='VDD',func=Pin.PWRIN,do_erc=True)]),
        Part(name='4001',dest=TEMPLATE,tool=SKIDL,keywords='CMOS Nor2',description='Quad Nor 2 inputs',ref_prefix='U',num_units=4,do_erc=True,pins=[
            Pin(num='7',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='14',name='VDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='1',name='~',do_erc=True),
            Pin(num='2',name='~',do_erc=True),
            Pin(num='3',name='~',func=Pin.OUTPUT,do_erc=True),
            Pin(num='4',name='~',func=Pin.OUTPUT,do_erc=True),
            Pin(num='5',name='~',do_erc=True),
            Pin(num='6',name='~',do_erc=True),