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  4. skidl.Pin.PASSIVE
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How to use the skidl.Pin.PASSIVE function in skidl

To help you get started, we’ve selected a few skidl examples, based on popular ways it is used in public projects.

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github xesscorp / skidl / skidl / libs / cypress_sklib.py View on Github external
Pin(num='42',name='P2.5',func=Pin.BIDIR,do_erc=True),
            Pin(num='52',name='P3.5',func=Pin.BIDIR,do_erc=True),
            Pin(num='13',name='GANT2',func=Pin.PWRIN,do_erc=True),
            Pin(num='23',name='VDDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='33',name='P1.5',func=Pin.BIDIR,do_erc=True),
            Pin(num='43',name='P2.6',func=Pin.BIDIR,do_erc=True),
            Pin(num='53',name='P3.6',func=Pin.BIDIR,do_erc=True),
            Pin(num='14',name='VDDR',func=Pin.PWRIN,do_erc=True),
            Pin(num='24',name='P0.4',func=Pin.BIDIR,do_erc=True),
            Pin(num='34',name='P1.6',func=Pin.BIDIR,do_erc=True),
            Pin(num='44',name='P2.7',func=Pin.BIDIR,do_erc=True),
            Pin(num='54',name='P3.7',func=Pin.BIDIR,do_erc=True),
            Pin(num='15',name='VDDR',func=Pin.PWRIN,do_erc=True),
            Pin(num='25',name='P0.5',func=Pin.BIDIR,do_erc=True),
            Pin(num='35',name='P1.7',func=Pin.BIDIR,do_erc=True),
            Pin(num='45',name='VREF',func=Pin.PASSIVE,do_erc=True),
            Pin(num='55',name='VSSA',func=Pin.PWRIN,do_erc=True),
            Pin(num='16',name='XTAL24I',do_erc=True),
            Pin(num='26',name='P0.6',func=Pin.BIDIR,do_erc=True),
            Pin(num='36',name='VDDA',func=Pin.PWRIN,do_erc=True),
            Pin(num='46',name='VDDA',func=Pin.PWRIN,do_erc=True),
            Pin(num='56',name='VCCD',func=Pin.PWROUT,do_erc=True),
            Pin(num='17',name='XTAL24O',func=Pin.OUTPUT,do_erc=True),
            Pin(num='27',name='P0.7',func=Pin.BIDIR,do_erc=True),
            Pin(num='37',name='P2.0',func=Pin.BIDIR,do_erc=True),
            Pin(num='47',name='P3.0',func=Pin.BIDIR,do_erc=True),
            Pin(num='57',name='GND_EP',func=Pin.PWRIN,do_erc=True),
            Pin(num='18',name='VDDR',func=Pin.PWRIN,do_erc=True),
            Pin(num='28',name='P1.0',func=Pin.BIDIR,do_erc=True),
            Pin(num='38',name='P2.1',func=Pin.BIDIR,do_erc=True),
            Pin(num='48',name='P3.1',func=Pin.BIDIR,do_erc=True),
            Pin(num='19',name='P0.0',func=Pin.BIDIR,do_erc=True),
github xesscorp / skidl / skidl / libs / allegro_sklib.py View on Github external
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib

SKIDL_lib_version = '0.0.1'

allegro = SchLib(tool=SKIDL).add_parts(*[
        Part(name='ACS706ELC-05C',dest=TEMPLATE,tool=SKIDL,keywords='hall effect current monitor sensor isolated obsolete',description='15A, Hall Effect Linear Current Sensor, SO-8, OBSOLETE',ref_prefix='U',num_units=1,fplist=['SOIC*3.9x4.9mm*Pitch1.27mm*'],do_erc=True,pins=[
            Pin(num='1',name='IP+',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='IP+',func=Pin.PASSIVE,do_erc=True),
            Pin(num='3',name='IP-',func=Pin.PASSIVE,do_erc=True),
            Pin(num='4',name='IP-',func=Pin.PASSIVE,do_erc=True),
            Pin(num='5',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='6',name='NC',func=Pin.NOCONNECT,do_erc=True),
            Pin(num='7',name='VIout',func=Pin.OUTPUT,do_erc=True),
            Pin(num='8',name='VCC',func=Pin.PWRIN,do_erc=True)]),
        Part(name='ACS711xLCTR-12AB',dest=TEMPLATE,tool=SKIDL,keywords='hall effect current monitor sensor isolated',description='±25A, Bidirectional, hall-effect current sensor, +3.3V supply, 55mV/A, SO-8',ref_prefix='U',num_units=1,fplist=['SOIC*3.9x4.9mm*Pitch1.27mm*'],do_erc=True,aliases=['ACS711xLCTR-25AB'],pins=[
            Pin(num='1',name='IP+',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='IP+',func=Pin.PASSIVE,do_erc=True),
            Pin(num='3',name='IP-',func=Pin.PASSIVE,do_erc=True),
            Pin(num='4',name='IP-',func=Pin.PASSIVE,do_erc=True),
            Pin(num='5',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='6',name='~FAULT',func=Pin.OUTPUT,do_erc=True),
            Pin(num='7',name='VIout',func=Pin.OUTPUT,do_erc=True),
            Pin(num='8',name='VCC',func=Pin.PWRIN,do_erc=True)]),
        Part(name='ACS712ELCTR-05B-T',dest=TEMPLATE,tool=SKIDL,keywords='hall effect current monitor sensor isolated',description='30A Unidirectional hall-effect current sensor, +5.0V supply, 133mV/A, SO-8',ref_prefix='U',num_units=1,fplist=['SOIC*3.9x4.9m*Pitch1.27mm*'],do_erc=True,aliases=['ACS712ELCTR-20A-T', 'ACS712ELCTR-30A-T', 'ACS713ELCTR-20A-T', 'ACS713ELCTR-30A-T'],pins=[
github xesscorp / skidl / skidl / libs / adc-dac_sklib.py View on Github external
Pin(num='4',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='5',name='D9(MSB)',do_erc=True),
            Pin(num='7',name='D8',do_erc=True),
            Pin(num='8',name='D7',do_erc=True),
            Pin(num='9',name='D6',do_erc=True),
            Pin(num='10',name='D5',do_erc=True),
            Pin(num='20',name='RFBACK',func=Pin.PASSIVE,do_erc=True),
            Pin(num='12',name='D4',do_erc=True),
            Pin(num='13',name='D3',do_erc=True),
            Pin(num='14',name='D2',do_erc=True),
            Pin(num='15',name='D1',do_erc=True),
            Pin(num='17',name='D0(LSB)',do_erc=True),
            Pin(num='18',name='VDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='19',name='VREF',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='AD7533KR',dest=TEMPLATE,tool=SKIDL,keywords='10bit DAC 1CH',description='10bit Multiplying DAC, 1 Channel, SOIC-16',ref_prefix='U',num_units=1,fplist=['DIP*', 'PDIP*'],do_erc=True,pins=[
            Pin(num='1',name='I_OUT1',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='I_OUT2',func=Pin.PASSIVE,do_erc=True),
            Pin(num='3',name='GND',func=Pin.PWRIN,do_erc=True),
            Pin(num='4',name='D9(MSB)',do_erc=True),
            Pin(num='5',name='D8',do_erc=True),
            Pin(num='6',name='D7',do_erc=True),
            Pin(num='7',name='D6',do_erc=True),
            Pin(num='8',name='D5',do_erc=True),
            Pin(num='9',name='D4',do_erc=True),
            Pin(num='10',name='D3',do_erc=True),
            Pin(num='11',name='D2',do_erc=True),
            Pin(num='12',name='D1',do_erc=True),
            Pin(num='13',name='D0(LSB)',do_erc=True),
            Pin(num='14',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='15',name='VREF',func=Pin.PASSIVE,do_erc=True),
            Pin(num='16',name='RFBACK',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='AD775',dest=TEMPLATE,tool=SKIDL,keywords='DAC CNA',description='DA Converter 8 bits - 20MHz, PDIP/SOIC-24',ref_prefix='U',num_units=1,do_erc=True,pins=[
github xesscorp / skidl / skidl / libs / intersil_sklib.py View on Github external
Pin(num='5',name='BLI',do_erc=True),
            Pin(num='6',name='ALI',do_erc=True),
            Pin(num='7',name='AHI',do_erc=True),
            Pin(num='8',name='HDEL',func=Pin.PASSIVE,do_erc=True),
            Pin(num='9',name='LDEL',func=Pin.PASSIVE,do_erc=True),
            Pin(num='10',name='AHB',do_erc=True),
            Pin(num='20',name='BHO',func=Pin.OUTPUT,do_erc=True),
            Pin(num='11',name='AHO',func=Pin.OUTPUT,do_erc=True),
            Pin(num='12',name='AHS',func=Pin.PASSIVE,do_erc=True),
            Pin(num='13',name='ALO',func=Pin.OUTPUT,do_erc=True),
            Pin(num='14',name='ALS',func=Pin.PASSIVE,do_erc=True),
            Pin(num='15',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='16',name='VDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='17',name='BLS',func=Pin.PASSIVE,do_erc=True),
            Pin(num='18',name='BLO',func=Pin.OUTPUT,do_erc=True),
            Pin(num='19',name='BHS',func=Pin.PASSIVE,do_erc=True)])])
github xesscorp / skidl / skidl / libs / intersil_sklib.py View on Github external
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib

SKIDL_lib_version = '0.0.1'

intersil = SchLib(tool=SKIDL).add_parts(*[
        Part(name='HIP2100_DFN',dest=TEMPLATE,tool=SKIDL,keywords='Half Bridge Gate Driver',description='High Frequency Half Bridge Driver, TTL/CMOS inputs, Output Current 2.0A, 100V, DFN-8 4x4mm',ref_prefix='U',num_units=1,fplist=['DFN*1EP*4x4mm*Pitch0.5mm*'],do_erc=True,aliases=['HIP2101_DFN'],pins=[
            Pin(num='1',name='VDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='2',name='NC',func=Pin.NOCONNECT,do_erc=True),
            Pin(num='3',name='NC',func=Pin.NOCONNECT,do_erc=True),
            Pin(num='4',name='HB',func=Pin.PWRIN,do_erc=True),
            Pin(num='5',name='HO',func=Pin.OUTPUT,do_erc=True),
            Pin(num='6',name='HS',func=Pin.PASSIVE,do_erc=True),
            Pin(num='7',name='HI',do_erc=True),
            Pin(num='8',name='LI',do_erc=True),
            Pin(num='9',name='NC',func=Pin.NOCONNECT,do_erc=True),
            Pin(num='10',name='NC',func=Pin.NOCONNECT,do_erc=True),
            Pin(num='11',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='12',name='LO',func=Pin.OUTPUT,do_erc=True),
            Pin(num='13',name='EP',func=Pin.OUTPUT,do_erc=True)]),
        Part(name='HIP2100_EPSOIC',dest=TEMPLATE,tool=SKIDL,keywords='Half Bridge Gate Driver',description='High Frequency Half Bridge Driver, TTL/CMOS inputs, Output Current 2.0A, 100V, EPSOIC-8',ref_prefix='U',num_units=1,fplist=['SOIC*1EP*3.9x4.9mm*Pitch1.27mm*'],do_erc=True,aliases=['HIP2101_EPSOIC'],pins=[
            Pin(num='1',name='VDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='2',name='HB',func=Pin.PWRIN,do_erc=True),
            Pin(num='3',name='HO',func=Pin.OUTPUT,do_erc=True),
            Pin(num='4',name='HS',func=Pin.PASSIVE,do_erc=True),
            Pin(num='5',name='HI',do_erc=True),
            Pin(num='6',name='LI',do_erc=True),
            Pin(num='7',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='8',name='LO',func=Pin.OUTPUT,do_erc=True),
github xesscorp / skidl / skidl / libs / Xicor_sklib.py View on Github external
Pin(num='12',name='~WP',do_erc=True),
            Pin(num='22',name='RL2',func=Pin.PASSIVE,do_erc=True),
            Pin(num='15',name='RL1',func=Pin.PASSIVE,do_erc=True),
            Pin(num='16',name='RH1',func=Pin.PASSIVE,do_erc=True),
            Pin(num='17',name='RW1',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='X9258',dest=TEMPLATE,tool=SKIDL,description='Quad 50k Digital Potentiometer, 256 steps, TSSOP-24/SOIC-24',ref_prefix='U',num_units=1,fplist=['SOIC*7.5x15.4mm*Pitch1.27mm*', 'TSSOP*4.4x7.8mm*Pitch0.65mm*'],do_erc=True,pins=[
            Pin(num='2',name='A0',do_erc=True),
            Pin(num='6',name='V+',func=Pin.PASSIVE,do_erc=True),
            Pin(num='7',name='VCC',func=Pin.PWRIN,do_erc=True),
            Pin(num='11',name='A2',do_erc=True),
            Pin(num='13',name='SDA',func=Pin.BIDIR,do_erc=True),
            Pin(num='23',name='SCL',do_erc=True),
            Pin(num='14',name='A1',do_erc=True),
            Pin(num='24',name='A3',do_erc=True),
            Pin(num='18',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='19',name='V-',func=Pin.PASSIVE,do_erc=True),
            Pin(num='3',name='RW3',func=Pin.PASSIVE,do_erc=True),
            Pin(num='4',name='RH3',func=Pin.PASSIVE,do_erc=True),
            Pin(num='5',name='RL3',func=Pin.PASSIVE,do_erc=True),
            Pin(num='8',name='RL0',func=Pin.PASSIVE,do_erc=True),
            Pin(num='9',name='RH0',func=Pin.PASSIVE,do_erc=True),
            Pin(num='10',name='RW0',func=Pin.PASSIVE,do_erc=True),
            Pin(num='20',name='RW2',func=Pin.PASSIVE,do_erc=True),
            Pin(num='21',name='RH2',func=Pin.PASSIVE,do_erc=True),
            Pin(num='12',name='~WP',do_erc=True),
            Pin(num='22',name='RL2',func=Pin.PASSIVE,do_erc=True),
            Pin(num='15',name='RL1',func=Pin.PASSIVE,do_erc=True),
            Pin(num='16',name='RH1',func=Pin.PASSIVE,do_erc=True),
            Pin(num='17',name='RW1',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='X9258-PART',dest=TEMPLATE,tool=SKIDL,description='X9258, Quad 50k Digital Potentiometer, 256 steps, TSSOP-24/SOIC-24',ref_prefix='U',num_units=5,fplist=['SOIC*7.5x15.4mm*Pitch1.27mm*', 'TSSOP*4.4x7.8mm*Pitch0.65mm*'],do_erc=True,pins=[
            Pin(num='2',name='A0',do_erc=True),
            Pin(num='6',name='V+',func=Pin.PASSIVE,do_erc=True),
github xesscorp / skidl / skidl / libs / digital-audio_sklib.py View on Github external
Pin(num='24',name='M1',do_erc=True),
            Pin(num='15',name='CBL',func=Pin.OUTPUT,do_erc=True),
            Pin(num='25',name='ERF',func=Pin.OUTPUT,do_erc=True),
            Pin(num='16',name='SEL',do_erc=True),
            Pin(num='26',name='SDATA',func=Pin.OUTPUT,do_erc=True),
            Pin(num='17',name='M3',do_erc=True),
            Pin(num='27',name='CE/F2',func=Pin.OUTPUT,do_erc=True),
            Pin(num='18',name='M2',do_erc=True),
            Pin(num='28',name='VERF',func=Pin.OUTPUT,do_erc=True),
            Pin(num='19',name='MCK',func=Pin.OUTPUT,do_erc=True)]),
        Part(name='CS8416-N',dest=TEMPLATE,tool=SKIDL,keywords='digital audio interface receiver spdif',description='192 kHz Digital Audio Interface Receiver (QFN-28)',ref_prefix='U',num_units=1,fplist=['QFN*28*'],do_erc=True,pins=[
            Pin(num='1',name='RXP0',do_erc=True),
            Pin(num='2',name='RXN',do_erc=True),
            Pin(num='3',name='VA',func=Pin.PWRIN,do_erc=True),
            Pin(num='4',name='AGND',func=Pin.PWRIN,do_erc=True),
            Pin(num='5',name='FILT',func=Pin.PASSIVE,do_erc=True),
            Pin(num='6',name='~RESET',do_erc=True),
            Pin(num='7',name='RXP4/RXSEL1',do_erc=True),
            Pin(num='8',name='RXP5/RXSEL0',do_erc=True),
            Pin(num='9',name='RXP6/TXSEL1',do_erc=True),
            Pin(num='10',name='RXP7/TXSEL0',do_erc=True),
            Pin(num='20',name='VD',func=Pin.PWRIN,do_erc=True),
            Pin(num='11',name='AD0/~CS~/NV/RERR',do_erc=True),
            Pin(num='21',name='RMCK',func=Pin.OUTPUT,do_erc=True),
            Pin(num='12',name='AD1/CDIN/~AUDIO',do_erc=True),
            Pin(num='22',name='OMCK',do_erc=True),
            Pin(num='13',name='SCL/CCLK/96KHZ',do_erc=True),
            Pin(num='23',name='SDOUT',func=Pin.OUTPUT,do_erc=True),
            Pin(num='14',name='SDA/CDOUT/RCBL',func=Pin.BIDIR,do_erc=True),
            Pin(num='24',name='OSCLK',func=Pin.BIDIR,do_erc=True),
            Pin(num='15',name='U/AD2/GPO2',func=Pin.OUTPUT,do_erc=True),
            Pin(num='25',name='OLRCK',func=Pin.BIDIR,do_erc=True),
github xesscorp / skidl / skidl / libs / diode_sklib.py View on Github external
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib

SKIDL_lib_version = '0.0.1'

diode = SchLib(tool=SKIDL).add_parts(*[
        Part(name='1N4001',dest=TEMPLATE,tool=SKIDL,keywords='diode',description='1000V 1A Fast recovery Rectifier Diode, DO-41',ref_prefix='D',num_units=1,fplist=['D*DO?41*', 'D*DO?204AL*', 'D*SOD81*'],do_erc=True,aliases=['1N4002', '1N4003', '1N4004', '1N4005', '1N4006', '1N4007', 'BA157', 'BA158', 'BA159'],pins=[
            Pin(num='1',name='K',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='A',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='1N4148',dest=TEMPLATE,tool=SKIDL,keywords='diode',description='20V 0.115A Very Fast Switching Diode, DO-35',ref_prefix='D',num_units=1,fplist=['D*DO?35*', 'D*SOD27*'],do_erc=True,aliases=['1N4448', '1N4149', '1N4151', '1N914', 'BA243', 'BA244', 'BA282', 'BA283', 'BAV17', 'BAV18', 'BAV19', 'BAV20', 'BAV21', 'BAW75', 'BAW76', 'BAY93'],pins=[
            Pin(num='1',name='K',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='A',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='1N5400',dest=TEMPLATE,tool=SKIDL,keywords='diode',description='1000V 3A Soft Recovery Ultrafast Rectifier Diode, DO-201AD',ref_prefix='D',num_units=1,fplist=['D*DO?201AD*'],do_erc=True,aliases=['1N5401', '1N5402', '1N5404', '1N5405', '1N5406', '1N5407', '1N5408', 'UF5400', 'UF5401', 'UF5402', 'UF5403', 'UF5404', 'UF5405', 'UF5406', 'UF5407', 'UF5408', '1N5403'],pins=[
            Pin(num='1',name='K',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='A',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='1N5820',dest=TEMPLATE,tool=SKIDL,keywords='diode Schottky',description='40V 3A Schottky Barrier Rectifier Diode, DO-201AD',ref_prefix='D',num_units=1,fplist=['D*DO?201AD*'],do_erc=True,aliases=['1N5821', '1N5822', 'MBR340'],pins=[
            Pin(num='1',name='K',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='A',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='1N6263',dest=TEMPLATE,tool=SKIDL,keywords='diode Schottky',description='50V 0.2A Small Signal Schottky Diode, DO-35',ref_prefix='D',num_units=1,fplist=['D*SOD23*', 'D*DO?35*'],do_erc=True,aliases=['BAT41', 'BAT42', 'BAT43', 'BAT46', 'BAT48RL', 'BAT85', 'BAT86S', 'BAT86'],pins=[
            Pin(num='1',name='K',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='A',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='B120-E3',dest=TEMPLATE,tool=SKIDL,keywords='diode Schottky',description='60V 1A Schottky Barrier Rectifier Diode, SMA/DO-214AC',ref_prefix='D',num_units=1,fplist=['D*DO?214AC*', 'D*SMA*', 'DO?214AC*', 'SMA*'],do_erc=True,aliases=['B130-E3', 'B140-E3', 'B150-E3', 'B160-E3'],pins=[
            Pin(num='1',name='K',func=Pin.PASSIVE,do_erc=True),
            Pin(num='2',name='A',func=Pin.PASSIVE,do_erc=True)]),
        Part(name='B220',dest=TEMPLATE,tool=SKIDL,keywords='diode Schottky',description='60V 2A Schottky Barrier Rectifier Diode, SMB',ref_prefix='D',num_units=1,fplist=['D*DO?214AC*', 'D*SMA*', 'DO?214AC*', 'SMA*'],do_erc=True,aliases=['B230', 'B240', 'B250', 'B260'],pins=[
github xesscorp / skidl / skidl / libs / nxp_armmcu_sklib.py View on Github external
Pin(num='25',name='PIO1_3/SWDIO/AD4/CT32B1_MAT2',func=Pin.BIDIR,do_erc=True),
            Pin(num='16',name='PIO0_7/~CTS~',func=Pin.BIDIR,do_erc=True),
            Pin(num='26',name='PIO1_4/AD5/CT32B1_MAT3/WAKEUP',func=Pin.BIDIR,do_erc=True),
            Pin(num='17',name='PIO0_8/MISO0/CT16B0_MAT0',func=Pin.BIDIR,do_erc=True),
            Pin(num='27',name='PIO1_11/AD7',func=Pin.BIDIR,do_erc=True),
            Pin(num='18',name='PIO0_9/MOSI0/CT16B0_MAT1',func=Pin.BIDIR,do_erc=True),
            Pin(num='28',name='PIO3_2',func=Pin.BIDIR,do_erc=True),
            Pin(num='19',name='PIO0_10/SWCLK/SCK0/CT16B0_MAT2',func=Pin.BIDIR,do_erc=True),
            Pin(num='29',name='VDD',func=Pin.PWRIN,do_erc=True)]),
        Part(name='LPC11E12FBD48/201',dest=TEMPLATE,tool=SKIDL,keywords='nxp lpc arm microcontroller cortex',description='LPC11E1x, 50MHz Cortex-M0 MCU, 32kB Flash, 4kB EEPROM, 10kB SRAM, USART, I2C, SSP, ADC, Power Profile, LQFP48',ref_prefix='U',num_units=1,fplist=['LQFP*7x7mm*Pitch0.5mm*'],do_erc=True,aliases=['LPC11E13FBD48/301', 'LPC11E14FBD48/401'],pins=[
            Pin(num='1',name='PIO1_25/CT32B0_MAT1',func=Pin.BIDIR,do_erc=True),
            Pin(num='2',name='PIO1_19/~DTR~/SSEL1',func=Pin.BIDIR,do_erc=True),
            Pin(num='3',name='~RESET~/PIO0_0',func=Pin.BIDIR,do_erc=True),
            Pin(num='4',name='PIO0_1/CLKOUT/CT32B0_MAT2',func=Pin.BIDIR,do_erc=True),
            Pin(num='5',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='6',name='XTALIN',func=Pin.PASSIVE,do_erc=True),
            Pin(num='7',name='XTALOUT',func=Pin.PASSIVE,do_erc=True),
            Pin(num='8',name='VDD',func=Pin.PWRIN,do_erc=True),
            Pin(num='9',name='PIO0_20/CT16B1_CAP0',func=Pin.BIDIR,do_erc=True),
            Pin(num='10',name='PIO0_2/SSEL0/CT16B0_CAP0',func=Pin.BIDIR,do_erc=True),
            Pin(num='20',name='NC',func=Pin.NOCONNECT,do_erc=True),
            Pin(num='30',name='PIO0_22/AD6/CT16B1_MAT1/MISO1',func=Pin.BIDIR,do_erc=True),
            Pin(num='40',name='PIO0_16/AD5/CT32B1_MAT3/WAKEUP',func=Pin.BIDIR,do_erc=True),
            Pin(num='11',name='PIO1_26/CT32B0_MAT2/RXD',func=Pin.BIDIR,do_erc=True),
            Pin(num='21',name='PIO1_24/CT32B0_MAT0',func=Pin.BIDIR,do_erc=True),
            Pin(num='31',name='PIO1_29/SCK0/CT32B0_CAP1',func=Pin.BIDIR,do_erc=True),
            Pin(num='41',name='VSS',func=Pin.PWRIN,do_erc=True),
            Pin(num='12',name='PIO1_27/CT32B0_MAT3/TXD',func=Pin.BIDIR,do_erc=True),
            Pin(num='22',name='PIO0_6/SCK0',func=Pin.BIDIR,do_erc=True),
            Pin(num='32',name='TDI/PIO0_11/AD0/CT32B0_MAT3',func=Pin.BIDIR,do_erc=True),
            Pin(num='42',name='PIO0_23/AD7',func=Pin.BIDIR,do_erc=True),
            Pin(num='13',name='PIO1_20/~DSR~/SCK1',func=Pin.BIDIR,do_erc=True),
github xesscorp / skidl / skidl / libs / brooktre_sklib.py View on Github external
from skidl import SKIDL, TEMPLATE, Part, Pin, SchLib

SKIDL_lib_version = '0.0.1'

brooktre = SchLib(tool=SKIDL).add_parts(*[
        Part(name='BT106',dest=TEMPLATE,tool=SKIDL,keywords='video CDA',description='Convertisseur Video D->A 8 bits',ref_prefix='U',num_units=1,do_erc=True,pins=[
            Pin(num='17',name='AGND',do_erc=True),
            Pin(num='18',name='AGND',do_erc=True),
            Pin(num='15',name='VAA',do_erc=True),
            Pin(num='19',name='VAA',do_erc=True),
            Pin(num='14',name='COMP',func=Pin.PASSIVE,do_erc=True),
            Pin(num='16',name='IOUT',func=Pin.OUTPUT,do_erc=True),
            Pin(num='1',name='CLK',do_erc=True),
            Pin(num='10',name='REF',do_erc=True),
            Pin(num='11',name='BLANK',do_erc=True),
            Pin(num='20',name='SYNC',do_erc=True),
            Pin(num='13',name='FSADJ',do_erc=True),
            Pin(num='12',name='VREF',do_erc=True),
            Pin(num='2',name='D7',do_erc=True),
            Pin(num='3',name='D6',do_erc=True),
            Pin(num='4',name='D5',do_erc=True),
            Pin(num='5',name='D4',do_erc=True),
            Pin(num='6',name='D3',do_erc=True),
            Pin(num='7',name='D2',do_erc=True),
            Pin(num='8',name='D1',do_erc=True),
            Pin(num='9',name='D0',do_erc=True)]),
        Part(name='BT208',dest=TEMPLATE,tool=SKIDL,keywords='video CAD',description='CAD 8 bits video',ref_prefix='U',num_units=1,do_erc=True,pins=[

skidl

A Python package for textually describing electronic circuit schematics.

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MIT
Latest version published 9 months ago

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