How to use the archinfo.arch.Arch function in archinfo

from archinfo.arch import Arch
from archinfo.arch import register_arch


class ArchBPF(Arch):

    # The beginning address of the data variables
    DATA_BASE = 0x800000
    # The beginning address of the temporary variables
    TEMP_BASE = 0x900000

    def __init__(self, endness="Iend_LE"):
        super(ArchBPF, self).__init__('Iend_LE')

    bits = 32
    vex_arch = None
    name = "BPF"
    instruction_endness = 'Iend_BE'
    memory_endness = 'Iend_LE'

    registers = {

cs_arch = _capstone.CS_ARCH_PPC
        cs_mode = _capstone.CS_MODE_32 + _capstone.CS_MODE_LITTLE_ENDIAN
    if _keystone:
        ks_arch = _keystone.KS_ARCH_PPC
        ks_mode = _keystone.KS_MODE_32 + _keystone.KS_MODE_LITTLE_ENDIAN
    # Unicorn not supported
    #uc_arch = _unicorn.UC_ARCH_PPC if _unicorn else None
    #uc_mode = (_unicorn.UC_MODE_32 + _unicorn.UC_MODE_LITTLE_ENDIAN) if _unicorn else None
    ret_instruction = b"\x20\x00\x80\x4e"
    nop_instruction = b"\x00\x00\x00\x60"
    instruction_alignment = 4
    register_list = [
        Register(name='gpr0', size=4, alias_names=('r0',),
                 general_purpose=True),
        Register(name='gpr1', size=4, alias_names=('r1', 'sp'),
                 general_purpose=True, default_value=(Arch.initial_sp, True, 'global')),
        Register(name='gpr2', size=4, alias_names=('r2',),
                 general_purpose=True),
        Register(name='gpr3', size=4, alias_names=('r3',),
                 general_purpose=True, argument=True, linux_entry_value='argc'),
        Register(name='gpr4', size=4, alias_names=('r4',),
                 general_purpose=True, argument=True, linux_entry_value='argv'),
        Register(name='gpr5', size=4, alias_names=('r5',),
                 general_purpose=True, argument=True, linux_entry_value='envp'),
        Register(name='gpr6', size=4, alias_names=('r6',),
                 general_purpose=True, argument=True, linux_entry_value='auxv'),
        Register(name='gpr7', size=4, alias_names=('r7',),
                 general_purpose=True, argument=True, linux_entry_value='ld_destructor'),
        Register(name='gpr8', size=4, alias_names=('r8',),
                 general_purpose=True, argument=True),
        Register(name='gpr9', size=4, alias_names=('r9',),
                 general_purpose=True, argument=True),

_capstone = None

try:
    import keystone as _keystone
except ImportError:
    _keystone = None

try:
    import unicorn as _unicorn
except ImportError:
    _unicorn = None

from .arch import Arch, register_arch, Endness, Register
from .tls import TLSArchInfo

class ArchMIPS64(Arch):
    def __init__(self, endness=Endness.BE):
        super(ArchMIPS64, self).__init__(endness)
        if endness == Endness.BE:

            self.function_prologs = set((
                # TODO
            ))
            self.function_epilogs = set((
                # TODO
            ))
            self.triplet = 'mips64-linux-gnu'
            self.linux_name = 'mips64'
            self.ida_name = 'mips64b'

    bits = 64
    vex_arch = "VexArchMIPS64"

from archinfo.arch import register_arch, Arch

class ArchMSP430(Arch):
    def __init__(self, endness="Iend_LE"):
        super(ArchMSP430, self).__init__(endness)
        # TODO: Define function prologs
        self.ip_offset = 0
        self.sp_offset = 2
        # bp_offset = 128
        # ret_offset = 16
        # lr_offset = 132
        # syscall_num_offset = 16
        self.call_pushes_ret = True
        self.stack_change = -2
        self.branch_delay_slot = False
        self.default_register_values = [(n, 0, False, None) for n in self.register_index]
    sizeof = {'short': 16, 'int': 16, 'long': 32, 'long long': 64}
    function_prologs = {}
    function_epilogs = {}

Register(name='s6', size=8, alias_names=('r22',),
                 general_purpose=True),
        Register(name='s7', size=8, alias_names=('r23',),
                 general_purpose=True),
        Register(name='t8', size=8, alias_names=('r24',),
                 general_purpose=True),
        Register(name='t9', size=8, alias_names=('r25',),
                 general_purpose=True, persistent=True),
        Register(name='k0', size=8, alias_names=('r26',),
                 general_purpose=True),
        Register(name='k1', size=8, alias_names=('r27',),
                 general_purpose=True),
        Register(name='gp', size=8, alias_names=('r28',),
                 persistent=True),
        Register(name='sp', size=8, alias_names=('r29',),
                 default_value=(Arch.initial_sp, True, 'global')),
        Register(name='s8', size=8, alias_names=('r30', 'fp', 'bp'),
                 general_purpose=True),
        Register(name='ra', size=8, alias_names=('r31', 'lr'),
                 general_purpose=True, persistent=True, linux_entry_value=0),
        Register(name='pc', size=8, alias_names=('ip',)),
        Register(name='hi', size=8, general_purpose=True),
        Register(name='lo', size=8, general_purpose=True),
        Register(name='f0', size=8,  floating_point=True, subregisters=[('f0_lo', 0, 4)]),
        Register(name='f1', size=8,  floating_point=True, subregisters=[('f1_lo', 0, 4)]),
        Register(name='f2', size=8,  floating_point=True, subregisters=[('f2_lo', 0, 4)]),
        Register(name='f3', size=8,  floating_point=True, subregisters=[('f3_lo', 0, 4)]),
        Register(name='f4', size=8,  floating_point=True, subregisters=[('f4_lo', 0, 4)]),
        Register(name='f5', size=8,  floating_point=True, subregisters=[('f5_lo', 0, 4)]),
        Register(name='f6', size=8,  floating_point=True, subregisters=[('f6_lo', 0, 4)]),
        Register(name='f7', size=8,  floating_point=True, subregisters=[('f7_lo', 0, 4)]),
        Register(name='f8', size=8,  floating_point=True, subregisters=[('f8_lo', 0, 4)]),

def __eq__(self, other):
        if not isinstance(other, Arch):
            return False
        return  self.name == other.name and \
                self.bits == other.bits and \
                self.memory_endness == other.memory_endness

Register(name='r6', size=4, alias_names=('v3',),
                 general_purpose=True),
        Register(name='r7', size=4, alias_names=('v4',),
                 general_purpose=True),
        Register(name='r8', size=4, alias_names=('v5',),
                 general_purpose=True),
        Register(name='r9', size=4, alias_names=('v6', 'sb'),
                 general_purpose=True),
        Register(name='r10', size=4, alias_names=('v7', 'sl'),
                 general_purpose=True),
        Register(name='r11', size=4, alias_names=('v8', 'fp', 'bp'),
                 general_purpose=True),
        Register(name='r12', size=4, general_purpose=True),
        # r12 is sometimes known as "ip" (intraprocedural call scratch) but we can't have that...
        Register(name='sp', size=4, alias_names=('r13',),
                 general_purpose=True, default_value=(Arch.initial_sp, True, 'global')),
        Register(name='lr', size=4, alias_names=('r14',),
                 general_purpose=True, concretize_unique=True),
        Register(name='pc', size=4, vex_name='r15t', alias_names=('r15', 'ip')),
        Register(name='cc_op', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='cc_dep1', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='cc_dep2', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='cc_ndep', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='qflag32', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='ip_at_syscall', size=4, artificial=True, concrete=False),
        # Cortex-M Has a different FPU from all other ARMs.
        Register(name='d0', size=8, subregisters=[('s0', 0, 2), ('s1', 2, 2)], floating_point=True),
        Register(name='d1', size=8, subregisters=[('s2', 0, 2), ('s3', 2, 2)], floating_point=True),
        Register(name='d2', size=8, subregisters=[('s4', 0, 2), ('s5', 2, 2)], floating_point=True),
        Register(name='d3', size=8, subregisters=[('s6', 0, 2), ('s7', 2, 2)], floating_point=True),
        Register(name='d4', size=8, subregisters=[('s8', 0, 2), ('s9', 2, 2)], floating_point=True),
        Register(name='d5', size=8, subregisters=[('s10', 0, 2), ('s11', 2, 2)], floating_point=True),

cs_arch = _capstone.CS_ARCH_PPC
        cs_mode = _capstone.CS_MODE_32 + _capstone.CS_MODE_LITTLE_ENDIAN
    if _keystone:
        ks_arch = _keystone.KS_ARCH_PPC
        ks_mode = _keystone.KS_MODE_PPC32 + _keystone.KS_MODE_BIG_ENDIAN
    # Unicorn not supported
    #uc_arch = _unicorn.UC_ARCH_PPC if _unicorn else None
    #uc_mode = (_unicorn.UC_MODE_32 + _unicorn.UC_MODE_LITTLE_ENDIAN) if _unicorn else None
    ret_instruction = b"\x20\x00\x80\x4e"
    nop_instruction = b"\x00\x00\x00\x60"
    instruction_alignment = 4
    register_list = [
        Register(name='gpr0', size=4, alias_names=('r0',),
                 general_purpose=True),
        Register(name='gpr1', size=4, alias_names=('r1', 'sp'),
                 general_purpose=True, default_value=(Arch.initial_sp, True, 'global')),
        Register(name='gpr2', size=4, alias_names=('r2',),
                 general_purpose=True),
        Register(name='gpr3', size=4, alias_names=('r3',),
                 general_purpose=True, argument=True, linux_entry_value='argc'),
        Register(name='gpr4', size=4, alias_names=('r4',),
                 general_purpose=True, argument=True, linux_entry_value='argv'),
        Register(name='gpr5', size=4, alias_names=('r5',),
                 general_purpose=True, argument=True, linux_entry_value='envp'),
        Register(name='gpr6', size=4, alias_names=('r6',),
                 general_purpose=True, argument=True, linux_entry_value='auxv'),
        Register(name='gpr7', size=4, alias_names=('r7',),
                 general_purpose=True, argument=True, linux_entry_value='ld_destructor'),
        Register(name='gpr8', size=4, alias_names=('r8',),
                 general_purpose=True, argument=True),
        Register(name='gpr9', size=4, alias_names=('r9',),
                 general_purpose=True, argument=True),

('ah', 1, 1)],
                 general_purpose=True, argument=True, linux_entry_value=0x1C),
        Register(name='ecx', size=4, subregisters=[('cx', 0, 2),
                                                   ('cl', 0, 1),
                                                   ('ch', 1, 1)],
                 general_purpose=True, argument=True),
        Register(name='edx', size=4, subregisters=[('dx', 0, 2),
                                                   ('dl', 0, 1),
                                                   ('dh', 1, 1)],
                 general_purpose=True, argument=True, linux_entry_value='ld_destructor'),
        Register(name='ebx', size=4, subregisters=[('bx', 0, 2),
                                                   ('bl', 0, 1),
                                                   ('bh', 1, 1)],
                 general_purpose=True, argument=True),
        Register(name='esp', size=4, alias_names=('sp',),
                 general_purpose=True, default_value=(Arch.initial_sp, True, 'global')),
        Register(name='ebp', size=4, alias_names=('bp',),
                 general_purpose=True, argument=True, linux_entry_value=0),
        Register(name='esi', size=4, subregisters=[('si', 0, 2),
                                                   ('sil', 0, 1),
                                                   ('sih', 1, 1)],
                 general_purpose=True, argument=True),
        Register(name='edi', size=4, subregisters=[('di', 0, 2),
                                                   ('dil', 0, 1),
                                                   ('dih', 1, 1)],
                 general_purpose=True, argument=True),
        Register(name='cc_op', size=4, default_value=(0, False, None), concrete=False, artificial=True),
        Register(name='cc_dep1', size=4, concrete=False, artificial=True),
        Register(name='cc_dep2', size=4, concrete=False, artificial=True),
        Register(name='cc_ndep', size=4, concrete=False, artificial=True),
        Register(name='d', size=4, alias_names=('dflag',),
                 default_value=(1, False, None), concrete=False),

Register(name='r6', size=4, alias_names=('v3',),
                 general_purpose=True),
        Register(name='r7', size=4, alias_names=('v4',),
                 general_purpose=True),
        Register(name='r8', size=4, alias_names=('v5',),
                 general_purpose=True),
        Register(name='r9', size=4, alias_names=('v6', 'sb'),
                 general_purpose=True),
        Register(name='r10', size=4, alias_names=('v7', 'sl'),
                 general_purpose=True),
        Register(name='r11', size=4, alias_names=('v8', 'fp', 'bp'),
                 general_purpose=True),
        Register(name='r12', size=4, general_purpose=True),
        # r12 is sometimes known as "ip" (intraprocedural call scratch) but we can't have that...
        Register(name='sp', size=4, alias_names=('r13',),
                 general_purpose=True, default_value=(Arch.initial_sp, True, 'global')),
        Register(name='lr', size=4, alias_names=('r14',),
                 general_purpose=True, concretize_unique=True),
        Register(name='pc', size=4, vex_name='r15t', alias_names=('r15', 'ip')),
        Register(name='cc_op', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='cc_dep1', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='cc_dep2', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='cc_ndep', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='qflag32', size=4, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='geflag0', size=4, vector=True, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='geflag1', size=4, vector=True, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='geflag2', size=4, vector=True, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='geflag3', size=4, vector=True, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='emnote', size=4, vector=True, default_value=(0, False, None), artificial=True, concrete=False),
        Register(name='cmstart', size=4, artificial=True, vector=True, default_value=(0, False, None), concrete=False),
        Register(name='cmlen', size=4, artificial=True, default_value=(0, False, None), concrete=False),
        Register(name='nraddr', size=4, artificial=True, default_value=(0, False, None), concrete=False),