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def __init__(self, trace=True, sca_mode=False, local_vars=[]):
super().__init__(trace, sca_mode)
self.emu = uc.Uc(uc.UC_ARCH_ARM64, uc.UC_MODE_ARM)
self.disasm = cs.Cs(cs.CS_ARCH_ARM64, cs.CS_MODE_ARM)
self.disasm.detail = True
self.word_size = 8
self.endianness = "little"
self.page_size = self.emu.query(uc.UC_QUERY_PAGE_SIZE)
self.page_shift = self.page_size.bit_length() - 1
self.pc = uc.arm64_const.UC_ARM64_REG_PC
known_regs = [i[len('UC_ARM64_REG_'):] for i in dir(uc.arm64_const) if '_REG' in i]
self.reg_map = {r.lower(): getattr(uc.arm64_const, 'UC_ARM64_REG_'+r) for r in known_regs}
self.stubbed_functions = local_vars
self.setup(sca_mode)
self.reset_stack()
unicorn.arm64_const.UC_ARM64_REG_X8,
unicorn.arm64_const.UC_ARM64_REG_X9,
unicorn.arm64_const.UC_ARM64_REG_X10,
unicorn.arm64_const.UC_ARM64_REG_X11,
unicorn.arm64_const.UC_ARM64_REG_X12,
unicorn.arm64_const.UC_ARM64_REG_X13,
unicorn.arm64_const.UC_ARM64_REG_X14,
unicorn.arm64_const.UC_ARM64_REG_X15,
unicorn.arm64_const.UC_ARM64_REG_X16,
unicorn.arm64_const.UC_ARM64_REG_X17,
unicorn.arm64_const.UC_ARM64_REG_X18,
unicorn.arm64_const.UC_ARM64_REG_X19,
unicorn.arm64_const.UC_ARM64_REG_X20,
unicorn.arm64_const.UC_ARM64_REG_X21,
unicorn.arm64_const.UC_ARM64_REG_X22,
unicorn.arm64_const.UC_ARM64_REG_X23,
unicorn.arm64_const.UC_ARM64_REG_X24,
unicorn.arm64_const.UC_ARM64_REG_X25,
unicorn.arm64_const.UC_ARM64_REG_X26,
unicorn.arm64_const.UC_ARM64_REG_X27,
unicorn.arm64_const.UC_ARM64_REG_X28,
unicorn.arm64_const.UC_ARM64_REG_X29,
unicorn.arm64_const.UC_ARM64_REG_X30,
unicorn.arm64_const.UC_ARM64_REG_SP,
unicorn.arm64_const.UC_ARM64_REG_PC
]
self.uc_nzcv_reg = unicorn.arm64_const.UC_ARM64_REG_NZCV
self.uc_pc_reg = unicorn.arm64_const.UC_ARM64_REG_PC
unicorn.arm64_const.UC_ARM64_REG_X4,
unicorn.arm64_const.UC_ARM64_REG_X5,
unicorn.arm64_const.UC_ARM64_REG_X6,
unicorn.arm64_const.UC_ARM64_REG_X7,
unicorn.arm64_const.UC_ARM64_REG_X8,
unicorn.arm64_const.UC_ARM64_REG_X9,
unicorn.arm64_const.UC_ARM64_REG_X10,
unicorn.arm64_const.UC_ARM64_REG_X11,
unicorn.arm64_const.UC_ARM64_REG_X12,
unicorn.arm64_const.UC_ARM64_REG_X13,
unicorn.arm64_const.UC_ARM64_REG_X14,
unicorn.arm64_const.UC_ARM64_REG_X15,
unicorn.arm64_const.UC_ARM64_REG_X16,
unicorn.arm64_const.UC_ARM64_REG_X17,
unicorn.arm64_const.UC_ARM64_REG_X18,
unicorn.arm64_const.UC_ARM64_REG_X19,
unicorn.arm64_const.UC_ARM64_REG_X20,
unicorn.arm64_const.UC_ARM64_REG_X21,
unicorn.arm64_const.UC_ARM64_REG_X22,
unicorn.arm64_const.UC_ARM64_REG_X23,
unicorn.arm64_const.UC_ARM64_REG_X24,
unicorn.arm64_const.UC_ARM64_REG_X25,
unicorn.arm64_const.UC_ARM64_REG_X26,
unicorn.arm64_const.UC_ARM64_REG_X27,
unicorn.arm64_const.UC_ARM64_REG_X28,
unicorn.arm64_const.UC_ARM64_REG_X29,
unicorn.arm64_const.UC_ARM64_REG_X30,
unicorn.arm64_const.UC_ARM64_REG_SP,
unicorn.arm64_const.UC_ARM64_REG_PC
]
self.uc_nzcv_reg = unicorn.arm64_const.UC_ARM64_REG_NZCV
self.uc_pc_reg = unicorn.arm64_const.UC_ARM64_REG_PC
unicorn.arm64_const.UC_ARM64_REG_X5,
unicorn.arm64_const.UC_ARM64_REG_X6,
unicorn.arm64_const.UC_ARM64_REG_X7,
unicorn.arm64_const.UC_ARM64_REG_X8,
unicorn.arm64_const.UC_ARM64_REG_X9,
unicorn.arm64_const.UC_ARM64_REG_X10,
unicorn.arm64_const.UC_ARM64_REG_X11,
unicorn.arm64_const.UC_ARM64_REG_X12,
unicorn.arm64_const.UC_ARM64_REG_X13,
unicorn.arm64_const.UC_ARM64_REG_X14,
unicorn.arm64_const.UC_ARM64_REG_X15,
unicorn.arm64_const.UC_ARM64_REG_X16,
unicorn.arm64_const.UC_ARM64_REG_X17,
unicorn.arm64_const.UC_ARM64_REG_X18,
unicorn.arm64_const.UC_ARM64_REG_X19,
unicorn.arm64_const.UC_ARM64_REG_X20,
unicorn.arm64_const.UC_ARM64_REG_X21,
unicorn.arm64_const.UC_ARM64_REG_X22,
unicorn.arm64_const.UC_ARM64_REG_X23,
unicorn.arm64_const.UC_ARM64_REG_X24,
unicorn.arm64_const.UC_ARM64_REG_X25,
unicorn.arm64_const.UC_ARM64_REG_X26,
unicorn.arm64_const.UC_ARM64_REG_X27,
unicorn.arm64_const.UC_ARM64_REG_X28,
unicorn.arm64_const.UC_ARM64_REG_X29,
unicorn.arm64_const.UC_ARM64_REG_X30,
unicorn.arm64_const.UC_ARM64_REG_SP,
unicorn.arm64_const.UC_ARM64_REG_PC
]
self.uc_nzcv_reg = unicorn.arm64_const.UC_ARM64_REG_NZCV
self.uc_pc_reg = unicorn.arm64_const.UC_ARM64_REG_PC
unicorn.arm64_const.UC_ARM64_REG_X20,
unicorn.arm64_const.UC_ARM64_REG_X21,
unicorn.arm64_const.UC_ARM64_REG_X22,
unicorn.arm64_const.UC_ARM64_REG_X23,
unicorn.arm64_const.UC_ARM64_REG_X24,
unicorn.arm64_const.UC_ARM64_REG_X25,
unicorn.arm64_const.UC_ARM64_REG_X26,
unicorn.arm64_const.UC_ARM64_REG_X27,
unicorn.arm64_const.UC_ARM64_REG_X28,
unicorn.arm64_const.UC_ARM64_REG_X29,
unicorn.arm64_const.UC_ARM64_REG_X30,
unicorn.arm64_const.UC_ARM64_REG_SP,
unicorn.arm64_const.UC_ARM64_REG_PC
]
self.uc_nzcv_reg = unicorn.arm64_const.UC_ARM64_REG_NZCV
self.uc_pc_reg = unicorn.arm64_const.UC_ARM64_REG_PC
unicorn.arm64_const.UC_ARM64_REG_X0,
unicorn.arm64_const.UC_ARM64_REG_X1,
unicorn.arm64_const.UC_ARM64_REG_X2,
unicorn.arm64_const.UC_ARM64_REG_X3,
unicorn.arm64_const.UC_ARM64_REG_X4,
unicorn.arm64_const.UC_ARM64_REG_X5,
unicorn.arm64_const.UC_ARM64_REG_X6,
unicorn.arm64_const.UC_ARM64_REG_X7,
unicorn.arm64_const.UC_ARM64_REG_X8,
unicorn.arm64_const.UC_ARM64_REG_X9,
unicorn.arm64_const.UC_ARM64_REG_X10,
unicorn.arm64_const.UC_ARM64_REG_X11,
unicorn.arm64_const.UC_ARM64_REG_X12,
unicorn.arm64_const.UC_ARM64_REG_X13,
unicorn.arm64_const.UC_ARM64_REG_X14,
unicorn.arm64_const.UC_ARM64_REG_X15,
unicorn.arm64_const.UC_ARM64_REG_X16,
unicorn.arm64_const.UC_ARM64_REG_X17,
unicorn.arm64_const.UC_ARM64_REG_X18,
unicorn.arm64_const.UC_ARM64_REG_X19,
unicorn.arm64_const.UC_ARM64_REG_X20,
unicorn.arm64_const.UC_ARM64_REG_X21,
unicorn.arm64_const.UC_ARM64_REG_X22,
unicorn.arm64_const.UC_ARM64_REG_X23,
unicorn.arm64_const.UC_ARM64_REG_X24,
unicorn.arm64_const.UC_ARM64_REG_X25,
unicorn.arm64_const.UC_ARM64_REG_X26,
unicorn.arm64_const.UC_ARM64_REG_X27,
unicorn.arm64_const.UC_ARM64_REG_X28,
unicorn.arm64_const.UC_ARM64_REG_X29,
unicorn.arm64_const.UC_ARM64_REG_X30,
unicorn.arm64_const.UC_ARM64_REG_SP,
unicorn.arm64_const.UC_ARM64_REG_X15,
unicorn.arm64_const.UC_ARM64_REG_X16,
unicorn.arm64_const.UC_ARM64_REG_X17,
unicorn.arm64_const.UC_ARM64_REG_X18,
unicorn.arm64_const.UC_ARM64_REG_X19,
unicorn.arm64_const.UC_ARM64_REG_X20,
unicorn.arm64_const.UC_ARM64_REG_X21,
unicorn.arm64_const.UC_ARM64_REG_X22,
unicorn.arm64_const.UC_ARM64_REG_X23,
unicorn.arm64_const.UC_ARM64_REG_X24,
unicorn.arm64_const.UC_ARM64_REG_X25,
unicorn.arm64_const.UC_ARM64_REG_X26,
unicorn.arm64_const.UC_ARM64_REG_X27,
unicorn.arm64_const.UC_ARM64_REG_X28,
unicorn.arm64_const.UC_ARM64_REG_X29,
unicorn.arm64_const.UC_ARM64_REG_X30,
unicorn.arm64_const.UC_ARM64_REG_SP,
unicorn.arm64_const.UC_ARM64_REG_PC
]
self.uc_nzcv_reg = unicorn.arm64_const.UC_ARM64_REG_NZCV
self.uc_pc_reg = unicorn.arm64_const.UC_ARM64_REG_PC
self.uc_gen_regs = [
unicorn.arm64_const.UC_ARM64_REG_X0,
unicorn.arm64_const.UC_ARM64_REG_X1,
unicorn.arm64_const.UC_ARM64_REG_X2,
unicorn.arm64_const.UC_ARM64_REG_X3,
unicorn.arm64_const.UC_ARM64_REG_X4,
unicorn.arm64_const.UC_ARM64_REG_X5,
unicorn.arm64_const.UC_ARM64_REG_X6,
unicorn.arm64_const.UC_ARM64_REG_X7,
unicorn.arm64_const.UC_ARM64_REG_X8,
unicorn.arm64_const.UC_ARM64_REG_X9,
unicorn.arm64_const.UC_ARM64_REG_X10,
unicorn.arm64_const.UC_ARM64_REG_X11,
unicorn.arm64_const.UC_ARM64_REG_X12,
unicorn.arm64_const.UC_ARM64_REG_X13,
unicorn.arm64_const.UC_ARM64_REG_X14,
unicorn.arm64_const.UC_ARM64_REG_X15,
unicorn.arm64_const.UC_ARM64_REG_X16,
unicorn.arm64_const.UC_ARM64_REG_X17,
unicorn.arm64_const.UC_ARM64_REG_X18,
unicorn.arm64_const.UC_ARM64_REG_X19,
unicorn.arm64_const.UC_ARM64_REG_X20,
unicorn.arm64_const.UC_ARM64_REG_X21,
unicorn.arm64_const.UC_ARM64_REG_X22,
unicorn.arm64_const.UC_ARM64_REG_X23,
unicorn.arm64_const.UC_ARM64_REG_X24,
unicorn.arm64_const.UC_ARM64_REG_X25,
unicorn.arm64_const.UC_ARM64_REG_X26,
unicorn.arm64_const.UC_ARM64_REG_X27,
unicorn.arm64_const.UC_ARM64_REG_X28,
unicorn.arm64_const.UC_ARM64_REG_X29,
self.context = None
err_msg = 'unhandled error'
if err == self.ERR_INVALID_TID:
err_msg = 'invalid thread id'
elif err == self.ERR_INVALID_CONTEXT:
err_msg = 'invalid context'
raise self.EmulatorSetupFailedError('Setup failed: %s' % err_msg)
# calculate the start address
address = self._next_instruction
if address == 0:
if self.uc._arch == unicorn.UC_ARCH_ARM:
address = self.uc.reg_read(unicorn.arm_const.UC_ARM_REG_PC)
elif self.uc._arch == unicorn.UC_ARCH_ARM64:
address = self.uc.reg_read(unicorn.arm64_const.UC_ARM64_REG_PC)
elif self.uc._arch == unicorn.UC_ARCH_X86 and self.uc._mode == unicorn.UC_MODE_32:
address = self.uc.reg_read(unicorn.x86_const.UC_X86_REG_EIP)
elif self.uc._arch == unicorn.UC_ARCH_X86 and self.uc._mode == unicorn.UC_MODE_64:
address = self.uc.reg_read(unicorn.x86_const.UC_X86_REG_RIP)
else:
raise self.EmulatorSetupFailedError('Unsupported arch')
if until > 0:
self.log_to_ui('[*] start emulation from %s to %s' % (hex(address), hex(self.end_ptr)))
else:
if step_mode == STEP_MODE_NONE or step_mode == STEP_MODE_SINGLE:
self.log_to_ui('[*] stepping %s' % hex(address))
elif step_mode == STEP_MODE_FUNCTION:
self.log_to_ui('[*] stepping to next function call')
elif step_mode == STEP_MODE_JUMP:
self.log_to_ui('[*] stepping to next jump')
def __init__(self):
super(Unicorn_machine_aarch64,self).__init__()
self.mu.mem_map(0x80000000, 128*1024*1024) #ram for qemu virt machine, 128M
if __DEBUG__:
#map a test area
self.mu.mem_map(0xfffffffffffff000, 4*1024)
self.uc_gen_regs = [
unicorn.arm64_const.UC_ARM64_REG_X0,
unicorn.arm64_const.UC_ARM64_REG_X1,
unicorn.arm64_const.UC_ARM64_REG_X2,
unicorn.arm64_const.UC_ARM64_REG_X3,
unicorn.arm64_const.UC_ARM64_REG_X4,
unicorn.arm64_const.UC_ARM64_REG_X5,
unicorn.arm64_const.UC_ARM64_REG_X6,
unicorn.arm64_const.UC_ARM64_REG_X7,
unicorn.arm64_const.UC_ARM64_REG_X8,
unicorn.arm64_const.UC_ARM64_REG_X9,
unicorn.arm64_const.UC_ARM64_REG_X10,
unicorn.arm64_const.UC_ARM64_REG_X11,
unicorn.arm64_const.UC_ARM64_REG_X12,
unicorn.arm64_const.UC_ARM64_REG_X13,
unicorn.arm64_const.UC_ARM64_REG_X14,
unicorn.arm64_const.UC_ARM64_REG_X15,
unicorn.arm64_const.UC_ARM64_REG_X16,
unicorn.arm64_const.UC_ARM64_REG_X17,
unicorn.arm64_const.UC_ARM64_REG_X18,