How to use the vsg.utils function in vsg

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github jeremiah-c-leary / vhdl-style-guide / vsg / rules / generate / rule_015.py View on Github external
def _analyze(self, oFile, oLine, iLineNumber):
        if oLine.isGenerateLabel and not oLine.isGenerateKeyword:
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / generate / rule_017.py View on Github external
def _extract(self, oLine):
        return utils.extract_label(oLine)
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / component / rule_005.py View on Github external
def _analyze(self, oFile, oLine, iLineNumber):
        if oLine.isComponentDeclaration and not re.match('^\s*component\s+\w+\s+is', oLine.line, re.IGNORECASE):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / line_below_rule.py View on Github external
def _fix_violations(self, oFile):
        for dViolation in self.violations[::-1]:
            fix.insert_blank_line_below(self, oFile, utils.get_violation_linenumber(dViolation))
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / entity / rule_015.py View on Github external
def _fix_violations(self, oFile):
        for dViolation in self.violations:
            oLine = utils.get_violating_line(oFile, dViolation)
            oLine.line = re.sub(r'^(\s*end)', r'\1 entity', oLine.line, flags=re.IGNORECASE)
            oLine.lineLower = oLine.line.lower()
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / component / rule_006.py View on Github external
def _extract(self, oLine):
        return utils.extract_words(oLine, ['is'])
github jeremiah-c-leary / vhdl-style-guide / vsg / rule_list.py View on Github external
'''
        Creates JUnit XML file listing all violations found.

        Parameters:

          sVhdlFileName (string)

        Returns: (junit testcase object)
        '''
        oTestcase = junit.testcase(sVhdlFileName, str(0), 'failure')
        oFailure = junit.failure('Failure')
        for oRule in self.rules:
            if len(oRule.violations) > 0:
                for dViolation in oRule.violations:
                    sLine = oRule.name + '_' + oRule.identifier + ': '
                    sLine += str(utils.get_violation_line_number(dViolation)) + ' : '
                    sLine += oRule._get_solution(dViolation)
                    oFailure.add_text(sLine)
                oTestcase.add_failure(oFailure)

        return oTestcase
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / generic / rule_016.py View on Github external
def _analyze(self, oFile, oLine, iLineNumber):
        if oLine.isGenericDeclaration and re.match('^.*;.*:', oLine.lineNoComment):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / if_statement / rule_023.py View on Github external
def _analyze(self, oFile, oLine, iLineNumber):
        if oLine.isElseIfKeyword and not re.match('^\s*elsif', oLine.lineLower):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)