How to use the triton.ARCH function in triton

def test_6(self):
        ctx = TritonContext()
        ctx.setArchitecture(ARCH.X86_64)
        ctx.enableMode(MODE.ONLY_ON_SYMBOLIZED, True)
        ctx.convertRegisterToSymbolicVariable(ctx.registers.rax)
        ctx.convertMemoryToSymbolicVariable(MemoryAccess(0, CPUSIZE.QWORD))

        inst = Instruction(b"\x48\x8b\x18") # mov rbx, qword ptr [rax]
        self.assertTrue(ctx.processing(inst))
        self.assertTrue(checkAstIntegrity(inst))

        self.assertEqual(len(inst.getReadRegisters()), 1)
        self.assertEqual(len(inst.getWrittenRegisters()), 1)
        self.assertEqual(len(inst.getLoadAccess()), 1)
        self.assertEqual(len(inst.getStoreAccess()), 0)

def setUp(self):
        """Define the arch."""
        self.ctx = TritonContext()
        self.ctx.setArchitecture(ARCH.X86_64)

def setUp(self):
        """Define the arch."""
        self.ctx = TritonContext()
        self.assertFalse(self.ctx.isArchitectureValid())
        self.ctx.setArchitecture(ARCH.AARCH64)
        self.assertTrue(self.ctx.isArchitectureValid())

def test_load_ds(self):
        """Check load from ds segment."""
        self.Triton = TritonContext()
        self.Triton.setArchitecture(ARCH.X86)

        inst = Instruction()
        # mov ax, ds:word_40213C
        inst.setOpcode(b"\x66\xA1\x3C\x21\x40\x00")
        self.Triton.processing(inst)

        self.assertEqual(inst.getOperands()[1].getAddress(), 0x40213C)
        self.assertEqual(inst.getOperands()[1].getBitSize(), 16)

def setUp(self):
        """Define the arch."""
        self.ctx = TritonContext()
        self.ctx.setArchitecture(ARCH.AARCH64)

code = [
    (0x400000, b"\x48\xB8\x48\x47\x46\x45\x44\x43\x42\x41"),     # movabs rax, 0x4142434445464748
    (0x40000a, b"\x48\xC7\xC6\x08\x00\x00\x00"),                 # mov    rsi, 0x8
    (0x400011, b"\x48\xC7\xC7\x00\x00\x01\x00"),                 # mov    rdi, 0x10000
    (0x400018, b"\x48\x89\x84\x77\x34\x12\x00\x00"),             # mov    QWORD PTR [rdi+rsi*2+0x1234], rax
]


if __name__ == '__main__':

    Triton = TritonContext()

    # Set the architecture
    Triton.setArchitecture(ARCH.X86_64)

    for (addr, opcode) in code:
        # Build an instruction
        inst = Instruction()

        # Setup opcode
        inst.setOpcode(opcode)

        # Setup Address
        inst.setAddress(addr)

        # Process everything
        Triton.processing(inst)

        # Display instruction
        print(inst)

# Load segments into triton.
def loadBinary(path):
    import lief
    binary = lief.parse(path)
    phdrs  = binary.segments
    for phdr in phdrs:
        size   = phdr.physical_size
        vaddr  = phdr.virtual_address
        print('[+] Loading 0x%06x - 0x%06x' %(vaddr, vaddr+size))
        Triton.setConcreteMemoryAreaValue(vaddr, phdr.content)
    return


if __name__ == '__main__':
    # Define the target architecture
    Triton.setArchitecture(ARCH.X86_64)

    # Define symbolic optimizations
    Triton.enableMode(MODE.ALIGNED_MEMORY, True)
    Triton.enableMode(MODE.ONLY_ON_SYMBOLIZED, True)

    # Load the binary
    loadBinary(os.path.join(os.path.dirname(__file__), 'r100.bin'))

    # Define a fake stack
    Triton.setConcreteRegisterValue(Triton.registers.rbp, 0x7fffffff)
    Triton.setConcreteRegisterValue(Triton.registers.rsp, 0x6fffffff)

    # Define an user input
    Triton.setConcreteRegisterValue(Triton.registers.rdi, 0x10000000)

    # Symbolize user inputs (30 bytes)

bits = self.r2p.bits
        self.arch = tritonarch[arch][bits]
        self.trace = collections.Counter()
        self.triton = triton.TritonContext()


        self.triton.setArchitecture(self.arch)
        self.triton.setAstRepresentationMode(triton.AST_REPRESENTATION.PYTHON)

        # Hack in order to be able to get triton register ids by name
        for r in self.triton.getAllRegisters():
            self.triton_regs[r.getName()] = r

        if self.arch == triton.ARCH.X86:
            self.pcreg = self.triton.registers.eip
        elif self.arch == triton.ARCH.X86_64:
            self.pcreg = self.triton.registers.rip
        else:
            raise(ValueError("Architecture not implemented"))

        setattr(self.memoryCaching, "memsolver", self.r2p)

def initialize():

    Triton = TritonContext()
    # Define the target architecture
    Triton.setArchitecture(ARCH.X86_64)

    # Define symbolic optimizations
    Triton.enableMode(MODE.ALIGNED_MEMORY, True)
    Triton.enableMode(MODE.ONLY_ON_SYMBOLIZED, True)

    # Define internal callbacks.
    Triton.addCallback(memoryCaching,   CALLBACK.GET_CONCRETE_MEMORY_VALUE)
    Triton.addCallback(constantFolding, CALLBACK.SYMBOLIC_SIMPLIFICATION)

    # Load the meory dump
    load_dump(Triton, os.path.join(os.path.dirname(__file__), "baby-re.dump"))

    # Symbolize user inputs
    symbolizeInputs(Triton)

    return Triton