How to use the reil.x86.operand.get_register function in reil

b = operand.get(ctx, i, 0)

        if b.size == 64:
          a_reg = 'rax'
          b_reg = 'rdx'
        elif b.size == 32:
          a_reg = 'eax'
          b_reg = 'edx'
        elif b.size == 16:
          a_reg = 'ax'
          b_reg = 'dx'
        elif b.size == 8:
          a_reg = 'al'
          b_reg = 'ah'

        a = operand.get_register(ctx, i, a_reg)

        result = ctx.tmp(b.size * 2)
        result_value = ctx.tmp(b.size)

        ctx.emit(  mul_  (a, b, result))

        ctx.emit(  str_  (result, result_value))
        operand.set_register(ctx, i, a_reg, result_value)
        ctx.emit(  lshr_ (result, imm(b.size, 8), result_value))
        operand.set_register(ctx, i, b_reg, result_value)

        _imul_set_flags(ctx, result)

    elif len(i.operands) == 2:
        # double operand form
        a = operand.get(ctx, i, 0)

def x86_daa(ctx, i):

    al = operand.get_register(ctx, i, 'al')

    result_al = ctx.tmp(8)
    tmp0 = ctx.tmp(16)
    tmp1 = ctx.tmp(8)

    # ((al & 0xf) > 9
    ctx.emit(  and_  (al, imm(0xf, 8), result_al))
    ctx.emit(  sub_  (result_al, imm(9, 8), tmp0))
    ctx.emit(  and_  (tmp0, imm(0xff00, 16), tmp0))
    ctx.emit(  bisnz_(tmp0, tmp1))
    #                  || af == 1)
    ctx.emit(  or_   (tmp1, r('af', 8), tmp1))
    ctx.emit(  jcc_  (tmp1, 'adjust0'))

    ctx.emit(  str_  (imm(0, 8), r('af', 8)))
    ctx.emit(  jcc_  (imm(1, 8), 'done0'))

def x86_aad(ctx, i):

    al = operand.get_register(ctx, i, 'al')
    ah = operand.get_register(ctx, i, 'ah')
    base = imm(10, 8)

    result_al = ctx.tmp(8)
    tmp0 = ctx.tmp(16)

    ctx.emit(  mul_  (ah, base, tmp0))
    ctx.emit(  add_  (al, tmp0, tmp0))
    ctx.emit(  str_  (tmp0, result_al))

    set_sf(ctx, result_al)
    set_zf(ctx, result_al)
    set_pf(ctx, result_al)

    ctx.emit(  undef_(r('of', 8)))
    ctx.emit(  undef_(r('af', 8)))
    ctx.emit(  undef_(r('cf', 8)))

def x86_cmpxchg8b(ctx, i):
    edx = operand.get_register(ctx, i, 'edx')
    eax = operand.get_register(ctx, i, 'eax')
    edx_eax = ctx.tmp(64)

    ecx = operand.get_register(ctx, i, 'ecx')
    ebx = operand.get_register(ctx, i, 'ebx')
    ecx_ebx = ctx.tmp(64)

    value = operand.get(ctx, i, 0)

    tmp0 = ctx.tmp(64)
    tmp1 = ctx.tmp(8)

    result_eax = ctx.tmp(32)
    result_edx = ctx.tmp(32)

    ctx.emit(  lshl_  (edx, imm(32, 8), edx_eax))
    ctx.emit(  str_   (eax, tmp0))
    ctx.emit(  or_    (edx_eax, tmp0, edx_eax))

    ctx.emit(  equ_  (value, edx_eax, tmp1))
    ctx.emit(  jcc_  (tmp1, 'equal'))

def x86_aam(ctx, i):

    al = operand.get_register(ctx, i, 'al')
    ah = operand.get_register(ctx, i, 'ah')
    base = imm(10, 8)

    result_al = ctx.tmp(8)
    result_ah = imm(0, 8)
    tmp0 = ctx.tmp(16)

    ctx.emit(  div_  (al, base, result_ah))
    ctx.emit(  mod_  (al, tmp0, result_al))

    set_sf(ctx, result_al)
    set_zf(ctx, result_al)
    set_pf(ctx, result_al)

    ctx.emit(  undef_(r('of', 8)))
    ctx.emit(  undef_(r('af', 8)))

def x86_aas(ctx, i):

    al = operand.get_register(ctx, i, 'al')
    ah = operand.get_register(ctx, i, 'ah')

    result_al = ctx.tmp(8)
    result_ah = ctx.tmp(8)
    tmp0 = ctx.tmp(16)
    tmp1 = ctx.tmp(8)

    # ((al & 0xf) > 9
    ctx.emit(  and_  (al, imm(0xf, 8), result_al))
    ctx.emit(  sub_  (result_al, imm(9, 8), tmp0))
    ctx.emit(  and_  (tmp0, imm(0xff00, 16), tmp0))
    ctx.emit(  bisnz_(tmp0, tmp1))
    #                  || af == 1)
    ctx.emit(  or_   (tmp1, r('af', 8), tmp1))
    ctx.emit(  jcc_  (tmp1, 'adjust'))

def x86_cmpxchg16b(ctx, i):
    rdx = operand.get_register(ctx, i, 'rdx')
    rax = operand.get_register(ctx, i, 'rax')
    rdx_rax = ctx.tmp(128)

    rcx = operand.get_register(ctx, i, 'rcx')
    rbx = operand.get_register(ctx, i, 'rbx')
    rcx_rbx = ctx.tmp(128)

    value = operand.get(ctx, i, 0)

    tmp0 = ctx.tmp(128)
    tmp1 = ctx.tmp(8)

    result_rax = ctx.tmp(64)
    result_rdx = ctx.tmp(64)

    ctx.emit(  lshl_  (rdx, imm(64, 8), rdx_rax))
    ctx.emit(  str_   (rax, tmp0))
    ctx.emit(  or_    (rdx_rax, tmp0, rdx_rax))

    ctx.emit(  equ_  (value, rdx_rax, tmp1))

def x86_cmpxchg8b(ctx, i):
    edx = operand.get_register(ctx, i, 'edx')
    eax = operand.get_register(ctx, i, 'eax')
    edx_eax = ctx.tmp(64)

    ecx = operand.get_register(ctx, i, 'ecx')
    ebx = operand.get_register(ctx, i, 'ebx')
    ecx_ebx = ctx.tmp(64)

    value = operand.get(ctx, i, 0)

    tmp0 = ctx.tmp(64)
    tmp1 = ctx.tmp(8)

    result_eax = ctx.tmp(32)
    result_edx = ctx.tmp(32)

    ctx.emit(  lshl_  (edx, imm(32, 8), edx_eax))

def x86_aam(ctx, i):

    al = operand.get_register(ctx, i, 'al')
    ah = operand.get_register(ctx, i, 'ah')
    base = imm(10, 8)

    result_al = ctx.tmp(8)
    result_ah = imm(0, 8)
    tmp0 = ctx.tmp(16)

    ctx.emit(  div_  (al, base, result_ah))
    ctx.emit(  mod_  (al, tmp0, result_al))

    set_sf(ctx, result_al)
    set_zf(ctx, result_al)
    set_pf(ctx, result_al)

    ctx.emit(  undef_(r('of', 8)))
    ctx.emit(  undef_(r('af', 8)))
    ctx.emit(  undef_(r('cf', 8)))