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def XOR(self):
if self.name.find(",") > 0:
r0, r1 = self.name.split()[1].split(",")
left = Operand(r0)
right = Operand(r1)
else:
r1 = self.name.split()[1]
left = Operand("A")
right = Operand(r1)
code = Code(
self.name.split()[0], self.opcode, self.name, left.immediate or right.immediate, self.length, self.cycles
)
code.addlines(self.ALU(left, right, "^"))
return code.getcode()
def DEC(self):
r0 = self.name.split()[1]
left = Operand(r0)
right = Literal(1)
code = Code(
self.name.split()[0], self.opcode, self.name, left.immediate or right.immediate, self.length, self.cycles
)
code.addlines(self.ALU(left, right, "-"))
return code.getcode()
def OR(self):
if self.name.find(",") > 0:
r0, r1 = self.name.split()[1].split(",")
left = Operand(r0)
right = Operand(r1)
else:
r1 = self.name.split()[1]
left = Operand("A")
right = Operand(r1)
code = Code(
self.name.split()[0], self.opcode, self.name, left.immediate or right.immediate, self.length, self.cycles
)
code.addlines(self.ALU(left, right, "|"))
return code.getcode()
def JR(self):
if self.name.find(",") > 0:
r0, r1 = self.name.split()[1].split(",")
left = Operand(r0)
right = Operand(r1)
else:
r1 = self.name.split()[1]
left = None
right = Operand(r1)
if left is not None:
l_code = left.get
if l_code.endswith("C") and "NC" not in l_code:
left.flag = True
l_code = "cpu.f_c()"
assert left.flag
assert right.immediate
code = Code(
self.name.split()[0], self.opcode, self.name, right.immediate, self.length, self.cycles, branch_op=True
)
if left is None:
code.addlines([
"cpu.PC += %d + " % self.length + inline_signed_int8("v"),
"cpu.PC &= 0xFFFF",
def RES(self):
r0, r1 = self.name.split()[1].split(",")
left = Literal(r0)
right = Operand(r1)
code = Code(self.name.split()[0], self.opcode, self.name, False, self.length, self.cycles)
code.addline("t = %s & ~(1 << %s)" % (right.get, left.get))
code.addline(right.set % "t")
return code.getcode()
def RR(self):
r0 = self.name.split()[1]
left = Operand(r0)
code = self.rotateright(self.name.split()[0], left, throughcarry=True)
return code.getcode()
def CALL(self):
if self.name.find(",") > 0:
r0, r1 = self.name.split()[1].split(",")
left = Operand(r0)
right = Operand(r1)
else:
r1 = self.name.split()[1]
left = None
right = Operand(r1)
if left is not None:
l_code = left.get
if l_code.endswith("C") and "NC" not in l_code:
left.flag = True
l_code = "cpu.f_c()"
assert left.flag
assert right.immediate
code = Code(
self.name.split()[0], self.opcode, self.name, right.immediate, self.length, self.cycles, branch_op=True
def PUSH(self):
r0 = self.name.split()[1]
left = Operand(r0)
code = Code(self.name.split()[0], self.opcode, self.name, False, self.length, self.cycles)
if "HL" in left.get:
code.addlines([
"cpu.mb.setitem(cpu.SP-1, cpu.HL >> 8) # High",
"cpu.mb.setitem(cpu.SP-2, cpu.HL & 0xFF) # Low",
"cpu.SP -= 2",
])
else:
# A bit of a hack, but you can only push double registers
code.addline("cpu.mb.setitem(cpu.SP-1, cpu.%s) # High" % left.operand[-2])
if left.operand == "AF":
# by taking fx 'A' and 'F' directly, we save calculations
code.addline("cpu.mb.setitem(cpu.SP-2, cpu.%s & 0xF0) # Low" % left.operand[-1])
else:
# by taking fx 'A' and 'F' directly, we save calculations
def AND(self):
if self.name.find(",") > 0:
r0, r1 = self.name.split()[1].split(",")
left = Operand(r0)
right = Operand(r1)
else:
r1 = self.name.split()[1]
left = Operand("A")
right = Operand(r1)
code = Code(
self.name.split()[0], self.opcode, self.name, left.immediate or right.immediate, self.length, self.cycles
)
code.addlines(self.ALU(left, right, "&"))
return code.getcode()
def SBC(self):
if self.name.find(",") > 0:
r0, r1 = self.name.split()[1].split(",")
left = Operand(r0)
right = Operand(r1)
else:
r1 = self.name.split()[1]
left = Operand("A")
right = Operand(r1)
code = Code(
self.name.split()[0], self.opcode, self.name, left.immediate or right.immediate, self.length, self.cycles
)
code.addlines(self.ALU(left, right, "-", carry=True))
return code.getcode()